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HD64F2149YV Folha de dados(PDF) 403 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Section 12 8-Bit Timers
Rev. 3.00 Jan 18, 2006 page 375 of 1044
REJ09B0280-0300
12.6
Usage Notes
Application programmers should note that the following kinds of contention can occur in the 8-bit
timer module.
12.6.1
Contention between TCNT Write and Clear
If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the clear
takes priority, so that the counter is cleared and the write is not performed. Figure 12.13 shows
this operation.
φ
Address
TCNT address
Internal write signal
Counter clear signal
TCNT
N
H'00
T1
T2
TCNT write cycle by CPU
Figure 12.13 Contention between TCNT Write and Clear



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