HD64F2149YV datasheet(399/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Section 12 8-Bit Timers

Rev. 3.00 Jan 18, 2006 page 371 of 1044

REJ09B0280-0300

12.3.6

Input Capture Operation

TMRX has input capture registers of TICR, TICRR and TICRF.

Narrow pulse width can be measured with TICRR and TICRF, using capture operation controlled

by the ICST bit in the TCONRI register of the timer connection.

When TMRIX detects rising edge and falling edge successively after the ICST bit is set to 1, the

value of TCNT at the time is transferred to TICRR and TICRF, respectively.

Input signal to TMRIX can be switched by the setting of the other bits in TCONRI register.

(1) Input capture signal input timing

Timing of the input capture operation is shown in figure 12.9.

TMRIX

Input capture

signal

TCNTX

N + 1

n + 1

TICRR

TICRF

Figure12.9 Timing of Input Capture Operation

If input capture signal is input while TICRR and TICRF is read, the input capture signal delays

by one system clock (

φ) period internally. Figure 12.10 shows the timing of this operation.

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