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HCS08 Folha de dados(PDF) 189 Page - NXP Semiconductors

Nome de Peças HCS08
Descrição Electrónicos  HCS08 Microcontrollers
PDF  198 Pages
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Appendix A Electrical Characteristics
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Freescale Semiconductor
189
A.10
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory.
Program and erase operations do not require any special power sources other than the normal VDD supply.
For more detailed information about program/erase operations, see the Memory section.
Zero-Scale Error
10 bit mode
EZS
0
±1.5
±3.1
LSB
VADIN = VSSA
8 bit mode
0
±0.5
±0.7
Full-Scale Error
10 bit mode
EFS
0
±1.0
±1.5
LSB
VADIN = VDDA
8 bit mode
0
±0.5
±0.5
Quantization Error
10 bit mode
EQ
——
±0.5
LSB
8 bit mode is
not truncated
1 Typical values assume V
DDAD = 5.0 V, Temp = 25°C, fADCK=1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
2 At 4 MHz, for maximum frequency, use proportionally lower source impedance.
Table A-11. Flash Characteristics
Characteristic
Symbol
Min
Typical
Max
Unit
Supply voltage for program/erase
–40
°C to 125°CV
prog/erase
2.7
5.5
V
Supply voltage for read operation
VRead
2.7
5.5
V
Internal FCLK frequency1
1
The frequency of this clock is controlled by a software setting.
fFCLK
150
200
kHz
Internal FCLK period (1/FCLK)
tFcyc
56.67
μs
Byte program time (random location)(2)
tprog
9tFcyc
Byte program time (burst mode)(2)
tBurst
4tFcyc
Page erase time2
2 These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for
calculating approximate time to program and erase.
tPage
4000
tFcyc
Mass erase time(2)
tMass
20,000
tFcyc
Program/erase endurance3
TL to TH = –40°C to + 125°C
T = 25
°C
3 Typical endurance for flash was evaluated for this product family on the 9S12Dx64. For additional information on how
Freescale defines typical endurance, please refer to Engineering Bulletin EB619/D, Typical Endurance for Nonvolatile Memory.
10,000
—
100,000
—
—
cycles
Data retention4
4 Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25
°C using the Arrhenius equation. For additional information on how Freescale defines typical data retention, please refer
to Engineering Bulletin EB618/D, Typical Data Retention for Nonvolatile Memory.
tD_ret
15
100
—
years
Table A-10. ADC Characteristics (continued)
Characteristic
Conditions
Symb
Min
Typ1
Max
Unit
Comment



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