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HCS08 Folha de dados(PDF) 71 Page - NXP Semiconductors |
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HCS08 Folha de dados(HTML) 71 Page - NXP Semiconductors |
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71 / 198 page ![]() Chapter 6 Parallel Input/Output Control MC9S08QD4 Series MCU Data Sheet, Rev. 6 Freescale Semiconductor 71 6.4.2.1 Port A Internal Pullup Enable (PTAPE) An internal pullup device can be enabled for each port pin by setting the corresponding bit in the pullup enable register (PTAPEn). The pullup device is disabled if the pin is configured as an output by the parallel I/O control logic or any shared peripheral function regardless of the state of the corresponding pullup enable register bit. The pullup device is also disabled if the pin is controlled by an analog function. 6.4.2.2 Port A Slew Rate Enable (PTASE) Slew rate control can be enabled for each port pin by setting the corresponding bit in the slew rate control register (PTASEn). When enabled, slew control limits the rate at which an output can transition in order to reduce EMC emissions. Slew rate control has no effect on pins which are configured as inputs. 76 54 321 0 R 00 PTAPE5 PTAPE41 PTAPE3 PTAPE2 PTAPE1 PTAPE0 W Reset: 000 00 000 1 PTAPE4 has no effect on the output-only PTA4 pin. Figure 6-4. Internal Pullup Enable for Port A Register (PTAPE) Table 6-3. PTAPE Register Field Descriptions Field Description 5:0 PTAPE[5:0] Internal Pullup Enable for Port A Bits — Each of these control bits determines if the internal pullup device is enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no effect and the internal pullup devices are disabled. 0 Internal pullup device disabled for port A bit n. 1 Internal pullup device enabled for port A bit n. 76 54 321 0 R 00 PTASE51 PTASE4 PTASE3 PTASE2 PTASE1 PTASE0 W Reset: 001 11 111 1 PTASE5 has no effect on the input-only PTA5 pin. Figure 6-5. Slew Rate Enable for Port A Register (PTASE) Table 6-4. PTASE Register Field Descriptions Field Description 5:0 PTASE[5:0] Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect. 0 Output slew rate control disabled for port A bit n. 1 Output slew rate control enabled for port A bit n. |
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