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HCS08 Folha de dados(PDF) 25 Page - NXP Semiconductors |
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HCS08 Folha de dados(HTML) 25 Page - NXP Semiconductors |
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25 / 198 page ![]() MC9S08QD4 Series MCU Data Sheet, Rev. 6 Freescale Semiconductor 25 Chapter 3 Modes of Operation 3.1 Introduction The operating modes of the MC9S08QD4 series are described in this chapter. Entry into each mode, exit from each mode, and functionality while in each of the modes are described. 3.2 Features • Active background mode for code development • Wait mode: — CPU shuts down to conserve power — System clocks running — Full voltage regulation maintained • Stop modes: — CPU and bus clocks stopped — Stop2 — Partial power down of internal circuits, RAM contents retained — Stop3 — All internal circuits powered for fast recovery 3.3 Run Mode This is the normal operating mode for the MC9S08QD4 series. This mode is selected when the BKGD/MS pin is high at the rising edge of reset. In this mode, the CPU executes code from internal memory with execution beginning at the address fetched from memory at 0xFFFE:0xFFFF after reset. 3.4 Active Background Mode The active background mode functions are managed through the background debug controller (BDC) in the HCS08 core. The BDC provides the means for analyzing MCU operation during software development. Active background mode is entered in any of five ways: • When the BKGD/MS pin is low at the rising edge of reset • When a BACKGROUND command is received through the BKGD pin • When a BGND instruction is executed • When encountering a BDC breakpoint |
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