HCS08 datasheet(186/198 Pages) NXP

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Appendix A Electrical Characteristics

MC9S08QD4 Series MCU Data Sheet, Rev. 6

186

Freescale Semiconductor

A.8

AC Characteristics

This section describes AC timing characteristics for each peripheral system.

A.8.1

Control Timing

Figure A-12. Reset Timing

Table A-8. Control Timing

Parameter

Symbol

Min

Typical1

1 Data in Typical column was characterized at 3.0 V, 25

°C.

Max

Unit

Bus frequency (tcyc = 1/fBus)fBus

1—8

MHz

Real-time interrupt internal oscillator period

tRTI

700

—

1300

μs

External reset pulse width2

2 This is the shortest pulse that is guaranteed to be recognized.

textrst

100

—

IRQ pulse width

Asynchronous path2

Synchronous path3

3 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or

may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.

tILIH, tIHIL

100

1.5 tcyc

——

KBIPx pulse width

Asynchronous path2

Synchronous path3

tILIH, tIHIL

100

1.5 tcyc

——

Port rise and fall time (load = 50 pF)4

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

4 Timing is shown with respect to 20% V

DD and 80% VDD levels. Temperature range –40°C to 125°C.

tRise, tFall

—

BKGD/MS setup time after issuing background debug force

reset to enter user or BDM modes

tMSSU

500

—

BKGD/MS hold time after issuing background debug force

reset to enter user or BDM modes 5

5 To enter BDM mode following a POR, BKGD/MS must be held low during the power-up and for a hold time of t

MSH after VDD

rises above VLVD.

tMSH

100

—

μs

textrst

RESET PIN

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