ADIN1111CCPZ-R7 datasheet(30/109 Pages) AD

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Data Sheet

ADIN1111

APPLICATIONS INFORMATION

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Rev. A | 30 of 109

ground as close to the ADIN1111 as possible. Consult individual

crystal vendors for recommended load information and crystal per-

formance specifications.

The crystal load capacitance (CL) is defined by the crystal ven-

dor. CPCB1 and CPCB2 are the parasitic capacitance between the

XTAL_I/CLK_IN and XTAL_O pins and the ground plan beneath,

respectively. CX1 and CX2 are the two external load capacitors

required for the oscillator to operate.

Assuming the following:

►

CPCB1 ≈ CPCB2 ≈ CPCBx

►

CX1 ≈ CX2 ≈ CXx

Then, CXx = 2 × CL – CPCBx – 3 pF

Choose precision capacitors for CXx with low appreciable tempera-

ture coefficient to minimize frequency errors.

To ensure minimum current consumption and to minimize stray

capacitance, make the connections between the crystal, capacitors,

and ground as close to the ADIN1111 as possible.

Figure 24. Crystal Oscillator Connection

External 25 MHz Clock Input

The clock source must be a dc-coupled with the ADIN1111 XTAL_I/

CLK_IN pin input, and the XTAL_O pin must be left open circuit.

With 0.8 V ≤ VCLK_IN p-p ≤ 2.5 V, the following results:

►

For 0.8 V ≤ VS p-p ≤ 1.0 V, the following is true:

►

R1 = 50 Ω

►

R2 is not required

►

For 1.0 V < VS p-p < 1.8 V, the following is true:

►

For best performance, set VCLK_IN to 1.0 V p-p

►

500 Ω ≤ R1 ≤ 2 kΩ

►

1 kΩ ≤ R2 ≤ 2 kΩ

►

VS p-p – VCLK_IN p-p > 0.2 V

►

R2 = VCLK_IN p−p × R1

VS p−p− VCLK_IN p−p

►

For 1.8 V ≤ VS p-p, the following is true:

►

R1 = 2 kΩ

►

R2 = 2 kΩ

Figure 25. External 25 MHz Clock Input Circuit

Table 25. Recommended R1 and R2 Values for Different VS p-p Values

S (V p-p)

1.0

50 Ω

Not applicable

1.2

500 Ω

2.5 kΩ

1.8

2 kΩ

2.2

2 kΩ

2.5

2 kΩ

2.8

2 kΩ

3.0

2 kΩ

3.3

2 kΩ

802.1AS SUPPORT

Typically, any device operating in an 802.1AS network executes the

following operations periodically:

►

Generate peer delay request and handle response

►

Receive peer delay request and generate response

►

Receive synchronization frame (follower clock)

►

Transmit synchronization frame (leader clock)

These features require that the MAC is capable of time stamping

specific incoming and outgoing frames.

To assist with these features, the ADIN1111 MAC provides the

following hardware:

►

Internal free-running counter

►

Syntonized counter

►

Waveform generation on TS_TIMER output

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