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AT89C5132-ROTIL Folha de dados(PDF) 173 Page - ATMEL Corporation |
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AT89C5132-ROTIL Folha de dados(HTML) 173 Page - ATMEL Corporation |
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173 / 181 page ![]() 173 4173D–USB–02/06 AT89C5132 24.2.9.2 Timings Table 124. External Clock AC Timings V DD = 2.7 to 3.3V, TA= -40 to +85°C 24.2.9.3 Waveforms Figure 24-23. External Clock Waveform Figure 24-24. AC Testing Input/Output Waveforms Notes: 1. During AC testing, all inputs are driven at V DD -0.5V for a logic 1 and 0.45V for a logic 0. 2. Timing measurements are made on all outputs at VIH min for a logic 1 and VIL max for a logic 0. Figure 24-25. Float Waveforms Note: For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loading VOH/VOL level occurs with IOL/IOH = ±20 mA. Symbol Parameter Min Max Unit T CLCL Clock Period 50 ns T CHCX High Time 10 ns T CLCX Low Time 10 ns T CLCH Rise Time 3 ns T CHCL Fall Time 3 ns T CR Cyclic Ratio in X2 Mode 40 60 % 0.45 V T CLCL V DD - 0.5 V IH1 V IL T CHCX T CLCH T CHCL T CLCX 0.45 V V DD - 0.5 0.7 V DD 0.3 V DD V IH min V IL max INPUTS OUTPUTS V LOAD V OH - 0.1V V OL + 0.1V V LOAD + 0.1V V LOAD - 0.1V Timing Reference Points |
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