AT89C5132-ROTIL datasheet(73/181 Pages) ATMEL

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4173D–USB–02/06

AT89C5132

Reset Value = 0000 0000b

Table 57. USBADDR Register

USBADDR (S:C6h) – USB Address Register

Bit Number

Bit

Mnemonic

Description

USBE

USB Enable Bit

Set to enable the USB controller.

Clear to disable and reset the USB controller.

SUSPCLK

Suspend USB Clock Bit

Set to disable the 48 MHz clock input (Resume Detection is still active).

Clear to enable the 48 MHz clock input.

5SDRMWUP

Send Remote Wake-up Bit

Set to force an external interrupt on the USB controller for Remote Wake UP

purpose.

An upstream resume is send only if the bit RMWUPE is set, all USB clocks are

enabled AND the USB bus was in SUSPEND state for at least 5 ms. See

UPRSM below.

Cleared by software.

Reserved

The values read from this bit is always 0. Do not set this bit.

UPRSM

Upstream Resume Bit (read only)

Set by hardware when SDRMWUP has been set and if RMWUPE is enabled.

Cleared by hardware after the upstream resume has been sent.

2RMWUPE

Remote Wake-up Enable Bit

Set to enable request an upstream resume signalling to the host.

Clear after the upstream resume has been indicated by RSMINPR.

Note: Do not set this bit if the host has not set the

DEVICE_REMOTE_WAKEUP feature for the device.

1CONFG

Configuration Bit

Set after a SET_CONFIGURATION request with a non-zero value has been

correctly processed.

Cleared by software when a SET_CONFIGURATION request with a zero value

is received.

Cleared by hardware on hardware reset or when an USB reset is detected on

the bus.

FADDEN

Function Address Enable Bit

Set by the device firmware after a successful status phase of a

SET_ADDRESS transaction. It shall not be cleared afterwards by the device

firmware.

Cleared by hardware on hardware reset or when an USB reset is received.

When this bit is cleared, the default function address is used (0).

543

210

FEN

UADD6

UADD5

UADD4

UADD3

UADD2

UADD1

UADD0

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