AT89C5132-ROTIL datasheet(79/181 Pages) ATMEL

79 / 181 page

4173D–USB–02/06

AT89C5132

Reset Value = 0000 0000b

Table 66. UEPDATX Register

UEPDATX (S:CFh) – USB Endpoint X FIFO Data Register (X = EPNUM set in UEPNUM)

Reset Value = XXh

Table 67. UBYCTLX Register

UBYCTX (S:E2h) – USB Endpoint X Byte Count Register (X = EPNUM set in UEPNUM)

Reset Value = 0000 0000b

Bit

Number

Bit

Mnemonic

Description

7 - 4

Reserved

The values read from these Bits are always 0. Do not set these Bits.

EP3INTE

Endpoint 3 Interrupt Enable Bit

Set to enable the interrupts for endpoint 3.

Clear to disable the interrupts for endpoint 3.

EP2INTE

Endpoint 2 Interrupt Enable Bit

Set to enable the interrupts for endpoint 2.

Clear this bit to disable the interrupts for endpoint 2.

EP1INTE

Endpoint 1 Interrupt Enable Bit

Set to enable the interrupts for the endpoint 1.

Clear to disable the interrupts for the endpoint 1.

EP0INTE

Endpoint 0 Interrupt Enable Bit

Set to enable the interrupts for the endpoint 0.

Clear to disable the interrupts for the endpoint 0.

543

210

FDAT7

FDAT6

FDAT5

FDAT4

FDAT3

FDAT2

FDAT1

FDAT0

Bit

Number

Bit

Mnemonic

Description

7 - 0

FDAT7:0

Endpoint X FIFO Data

Data byte to be written to FIFO or data byte to be read from the FIFO, for the

Endpoint X (see EPNUM).

543

210

BYCT6

BYCT5

BYCT4

BYCT3

BYCT2

BYCT1

BYCT0

Bit

Number

Bit

Mnemonic

Description

Reserved

The values read from this Bits are always 0. Do not set this bit.

6-0

BYCT7:0

Byte Count

Byte count of a received data packet. This byte count is equal to the number of

data Bytes received after the Data PID.

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