AT89C5132-ROTIL datasheet(78/181 Pages) ATMEL

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4173D–USB–02/06

AT89C5132

Reset Value = 0000 0000b

Table 64. UEPINT Register

UEPINT (S:F8h Read-only) – USB Endpoint Interrupt Register

Reset Value = 0000 0000b

Table 65. UEPIEN Register

UEPIEN (S:C2h) – USB Endpoint Interrupt Enable Register

Bit

Number

Bit

Mnemonic

Description

7 - 4

Reserved

The values read from these Bits are always 0. Do not set these Bits.

EP3RST

Endpoint 3 FIFO Reset

Set and clear to reset the endpoint 3 FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

EP2RST

Endpoint 2 FIFO Reset

Set and clear to reset the endpoint 2 FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

EP1RST

Endpoint 1 FIFO Reset

Set and clear to reset the endpoint 1 FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

EP0RST

Endpoint 0 FIFO Reset

Set and clear to reset the endpoint 0 FIFO prior to any other operation, upon

hardware reset or when an USB bus reset has been received.

543

210

EP3INT

EP2INT

EP1INT

EP0INT

Bit

Number

Bit

Mnemonic

Description

7 - 4

Reserved

The values read from these Bits are always 0. Do not set these Bits.

EP3INT

Endpoint 3 Interrupt Flag

Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 3

interrupt is enabled in UEPIEN.

Must be cleared by software.

EP2INT

Endpoint 2 Interrupt Flag

Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 2

interrupt is enabled in UEPIEN.

Must be cleared by software.

EP1INT

Endpoint 1 Interrupt Flag

Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 1

interrupt is enabled in UEPIEN.

Must be cleared by software.

EP0INT

Endpoint 0 Interrupt Flag

Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 0

interrupt is enabled in UEPIEN.

Must be cleared by software.

543

210

EP3INTE

EP2INTE

EP1INTE

EP0INTE

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