AT89C5132-ROTIL datasheet(159/181 Pages) ATMEL

159 / 181 page

159

4173D–USB–02/06

AT89C5132

24.2

AC Characteristics

24.2.1

External 8-bit Bus Cycles

24.2.1.1

Definition of Symbols

Table 108. External 8-bit Bus Cycles Timing Symbol Definitions

24.2.1.2

Timings

Test conditions: capacitive load on all pins = 50 pF.

Table 109. External 8-bit Bus Cycle – Data Read AC Timings

DD = 2.7 to 3.3V, TA = -40° to +85°C

Signals

Conditions

Address

High

Data In

Low

ALE

Valid

Data Out

No Longer Valid

RRD

Floating

WWR

Symbol

Parameter

Variable Clock

Standard Mode

Variable Clock

X2 Mode

Unit

Min

Max

Min

Max

CLCL

Clock Period

LHLL

ALE Pulse Width

2·T

CLCL-15

AVLL

Address Valid to ALE Low

CLCL-20

0.5·T

CLCL-20

LLAX

Address hold after ALE Low

CLCL-20

0.5·T

CLCL-20

LLRL

ALE Low to RD Low

3·T

CLCL-30

1.5·T

CLCL-30

RLRH

RD Pulse Width

6·T

CLCL-25

3·T

CLCL-25

RHLH

RD high to ALE High

CLCL-20

CLCL+20

0.5·T

CLCL-20

0.5·T

CLCL+20

AVDV

Address Valid to Valid Data In

9·T

CLCL-65

4.5·T

CLCL-65

AVRL

Address Valid to RD Low

4·T

CLCL-30

2·T

CLCL-30

RLDV

RD Low to Valid Data

5·T

CLCL-30

2.5·T

CLCL-30

RLAZ

RD Low to Address Float

RHDX

Data Hold After RD High

RHDZ

Instruction Float After RD High

2·T

CLCL-25

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