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ADIN1100BCPZ-R7 Folha de dados(PDF) 62 Page - Analog Devices |
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ADIN1100BCPZ-R7 Folha de dados(HTML) 62 Page - Analog Devices |
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62 / 78 page  Data Sheet ADIN1100 ETHERNET CLAUSE 45 REGISTER DETAILS analog.com Rev. 0 | 62 of 78 PHY MAC INTERFACE RESET REGISTER Device Address: 0x1E; Register Address: 0x8815, Reset: 0x0000, Name: CRSM_MAC_IF_RST Table 94. Bit Descriptions for CRSM_MAC_IF_RST Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 CRSM_MAC_IF_RST PHY MAC Interface Reset. The PHY MAC interface reset register allows a managed PHY MAC interface reset to be initiated. When the PHY MAC interface is reset, normal operation resumes, and the bit self clears. 0x0 R/W SC SYSTEM STATUS REGISTER Device Address: 0x1E; Register Address: 0x8818, Reset: 0x0000, Name: CRSM_STAT Table 95. Bit Descriptions for CRSM_STAT Bits Bit Name Description Reset Access [15:2] RESERVED Reserved. 0x0 R 1 CRSM_SFT_PD_RDY Software Power-Down Status. This bit indicates that the system is in the software power-down state. 0x0 R 0 CRSM_SYS_RDY System Ready. This bit indicates that the start-up sequence is complete and the system is ready for normal operation. 0x0 R CRSM POWER MANAGEMENT CONTROL REGISTER Device Address: 0x1E; Register Address: 0x8819, Reset: 0x0000, Name: CRSM_PMG_CNTRL Table 96. Bit Descriptions for CRSM_PMG_CNTRL Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 CRSM_FRC_OSC_EN Force Digital Boot Oscillator Clock Enable. 0x0 R/W MAC INTERFACE CONFIGURATION REGISTER Device Address: 0x1E; Register Address: 0x882B, Reset: 0x0000, Name: CRSM_MAC_IF_CFG Configure the MAC interface only by pins. Do not change by software. Table 97. Bit Descriptions for CRSM_MAC_IF_CFG Bits Bit Name Description Reset Access 15 CRSM_RMII_CLK50 This Bit Indicates If the RMII REF_CLK Frequency is 50 MHz or 25 MHz. Only for debugging purposes. Pin dependent R/W 14 CRSM_RMII_CLK_EN CRSM RMII Clock Enable Status. This bit indicates if the RMII clock generation is enabled. Pin dependent R/W [13:9] RESERVED Reserved. 0x0 R 8 CRSM_RMII_MEDIA_CNV_EN Media Converter Enable. When this bit is 1, the media converter functionality for the RMII MAC interface mode is enabled. Note that the media converter functionality can only be enabled if an RMII MAC interface is being used. Pin dependent R/W [7:5] RESERVED Reserved. 0x0 R 4 CRSM_RMII_EN RMII MAC Interface Enable. Enable RMII MAC interface mode. Do not set CRSM_RGMII_EN and CRSM_RMII_EN at the same time. Configure the MAC interface only by pins. Do not change by software. Pin dependent R/W [3:1] RESERVED Reserved. 0x0 R 0 CRSM_RGMII_EN RGMII MAC Interface Enable. Enable RGMII MAC interface mode. Do not set CRSM_RGMII_EN and CRSM_RMII_EN at the same time. Configure the MAC interface only by pins. Do not change by software. Pin dependent R/W |
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