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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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AM652X Folha de dados(PDF) 250 Page - Texas Instruments |
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AM652X Folha de dados(HTML) 250 Page - Texas Instruments |
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250 / 299 page  250 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated 6.9 Interprocessor Communication 6.9.1 NAVSS NAVSS specifies the data structures used by Texas Instruments standard communications modules to facilitate direct memory access (DMA) and to provide a consistent application programming interface (API) to the host software in multi-core devices. The data structures and the API used to manipulate them will be jointly referred to as NAVSS. Frequent tasks are commonly offloaded from the host processor to peripheral hardware to increase system performance. Significant performance gains may result from careful design of the host software and communication module interface. In networking systems, packet transmission and reception are critical tasks. Texas Instruments has developed the NAVSS standard, which is aimed at maximizing the efficiency of interaction between the host software and communications modules. The design goals for NAVSS are as follows: • Minimize host interaction • Maximize memory use efficiency • Maximize bus burst efficiency • Maximize symmetry between transmit/receive operations • Maximize scalability for number of connections/buffer sizes/queue sizes/protocols supported • Minimize protocol specific features • Minimize complexity Navigator subsystem's (main NAVSS) has the following hardware components: • Ring Accelerator (RA) • Proxy • Secure Proxy • Interrupt Aggregator (IA) • Interrupt Router (IR) • Unified DMA – Third Party Channel Controller (UDMA-C) • Unified Transfer Controller (UTC) • Data Routing Unit (DRU) • Unified DMA – Peripheral Root Complex (UDMA-P) • Peripheral DMA (PDMA) • Embedded DMA • UDMA Hardware/Software Interface For more information, see section Navigator Subsystem (NAVSS) in chapter Interprocessor Communication of the device TRM. |
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