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CS89712 Folha de dados(PDF) 8 Page - Cirrus Logic

Nome de Peças CS89712
Descrição Electrónicos  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS89712 Folha de dados(HTML) 8 Page - Cirrus Logic

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CS89712
8
DS502PP2
current. Also, the internal peripheral’s signals get
set to their Reset State.
When first powered, or reset by the nPOR (Power
On Reset, active low) signal, the CS89712 is forced
into the Standby State. This is known as a cold re-
set, and when leaving the Standby State after a cold
reset, external wake up is the only way to wake up
the device. When leaving the Standby State after
non-cold reset conditions (i.e., the software has
forced the device into the Standby State), the tran-
sition to the Operating State can be caused by a ris-
ing edge on the WAKEUP input signal or by an
enabled interrupt. Normally, when entering the
Standby State from the Operating State, the soft-
ware will leave some interrupt sources enabled.
Note:
The CPU cannot be awakened by the TINT,
WEINT, and BLINT interrupts when in the
Standby State.
Typically, software writes to the Standby internal
memory location to cause the transition from the
Operating State to the Standby State. Before enter-
ing the Standby State, if external I/O devices (such
as the CL-PS6700s connected to nCS[4] or nCS[5])
are in use, the software must ensure that they are
idle before writing to the Standby State location.
Before entering the Standby State, the software
must properly disable the DAI. Failing to do so will
result in higher than expected power consumption
in the Standby State, as well as unpredictable oper-
ation of the DAI. The DAI can be re-enabled after
transitioning back to the Operating State.
The system can also be forced into the Standby
State by hardware if the nPWRFL or nURESET in-
puts are forced low. The only exit from the Standby
State is to the Operating State.
The system will only transition to the Operating
State from the Standby State under the following
conditions: when the nPWRFL input pin is high,
when the nEXTPWR input pin is low, or when the
BATOK input pin is high. This prevents the system
from starting when the power supply is inadequate
Address (W/B)
Operating
Idle
Standby
nPOR
RESET
nURESET
RESET
SDRAM Control
On
On
SELFREF
Off
N/A
UARTs
On
On
Off
Reset
Reset
LCD FIFO
On
On
Reset
Reset
Reset
LCD
On
On
Off
Reset
Reset
ADC Interface
On
On
Off
Reset
Reset
SSI2 Interface
On
On
Off
Reset
Reset
DAI Interface
On
On
Off
Reset
Reset
CODEC
On
On
Off
Reset
Reset
Timers
On
On
Off
Reset
Reset
RTC
On
On
OnOnOn
LED Flasher
On
On
On
Reset
Reset
DC-to-DC
On
On
Off
Reset
Reset
CPU
On
Off
Off
Reset
Reset
Interrupt Control
On
On
On
Reset
Reset
PLL/CLKEN Signal
On
On
Off
Off
Off
Table 1. Peripheral Status in Different Power Management States



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