UCD3138ARMHT datasheet(48/87 Pages) TI1

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UCD3138A

SLUSC66C – MARCH 2015 – REVISED SEPTEMBER 2016

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Detailed Description

7.5.9

Global I/O

Up to 30 pins in UCD3138A can be configured to serve as a general purpose input or output pin (GPIO).

This includes all digital input or output pins except for the RESET pin.

The pins that cannot be configured as GPIO pins are the supply pins, ground pins, ADC-12 analog input

pins, EADC analog input pins and the RESET pin.

There are two ways to configure and use the digital pins as GPIO pins:

1. Through the centralized Global I/O control registers.

2. Through the distributed control registers in the specific peripheral that shares it pins with the standard

GPIO functionality.

The Global I/O registers offer full control of:

1. Configuring each pin as a GPIO.

2. Setting each pin as input or output.

3. Reading the pin’s logic state, if it is configured as an input pin.

4. Setting the logic state of the pin, if it is configured as an output pin.

5. Configuring pin/pins as open drain or push-pull (Normal)

The Global I/O registers include Global I/O EN register, Global I/O OE Register, Global I/O Open Drain

Control Register, Global I/O Value Register and Global I/O Read Register.

The following is showing the format of Global I/O EN Register (GLBIOEN) as an example:

BIT NUMBER

29:0

Bit Name

GLOBAL_IO_EN

Access

R/W

Default

00_0000_0000_0000_0000_0000_0000_0000

Bits 29-0: GLOBAL_IO_EN – This register enables the global control of digital I/O pins

0 = Control of IO is done by the functional block assigned to the IO (Default)

1 = Control of IO is done by Global IO registers.

BIT

PIN_NAME

PIN NUMBER

UCD3138A-64 PINS UCD3138A-40 PINS

FAULT[3]

ADC_EXT_TRIG

12, 26

TCK

TDO

TMS

TDI

SCI_TX[1]

SCI_TX[0]

SCI_RX[1]

SCI_RX[0]

TMR_CAP

12, 26, 41

8, 21

TMR_PWM[1]

TMR_PWM[0]

12, 26, 31, 37

PMBUS-CLK

PMBUS-DATA

CONTROL

ALERT

EXT_INT

26, 34

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