AD7993 datasheet(15/27 Pages) AD

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AD7994/AD7993

–15–

REV. PrF

PRELIMINARYTECHNICAL DATA

INTERNAL REGISTER STRUCTURE

The AD7994/AD7993 contains seventeen internal regis-

ters, as shown in Figure 9, that are used to store conver-

sion results, high and low conversion limits, and to

configure and control the device. Sixteen are data registers

and one is an address pointer register.

Figure 9.

AD7994/AD7993 Register Structure

Each data register has an address which is pointed to by

the Address Pointer register when communicating with it.

The Conversion Result Register is the only data register

that is read only.

Table II. Address Pointer Register

0000

ADDRESS POINTER REGISTER

The Address Pointer register itself does not have, nor does

it require, an address, as it is the register to which the first

data byte of every Write operation is written automatically.

The Address Pointer Register is an 8-bit register in which

the four LSBs are used as pointer bits to store an address

that points to one of the data registers of the AD7994/

AD7993, while the four MSBs are used as command bits

when operating in Mode 2 (see Modes of Operation sec-

tion). The first byte following each write address is the

address of one of the data registers, which is stored in the

Address Pointer Register, and selects the data register to

which subsequent data bytes are written. Only the four

LSBs of this register are used to select a data register. On

Power up the Address Point register contains all 0’s,

pointing to the Conversion Result Register.

CONFIGURATION

ADDRESS

POINTER

SERIAL BUS INTERFACE

SDA

SCL

DATALOW

DATAHIGH

DATALOW

HYSTERESIS

DATAHIGH

CYCLE TIMER

ALERT STATUS

CONVERSION

RESULT REGISTER

HYSTERESIS

DATAHIGH

DATALOW

HYSTERESIS

DATAHIGH

DATALOW

HYSTERESIS

Table III. AD7994/AD7993 Register Addresses

Registers

Conversion Result Register (Read)

Alert Status Register (Read/Write)

Configuration Register (Read/Write)

Cycle Timer Register (Read/Write)

DATALOW Reg CH1 (Read/Write)

DATAHIGH Reg CH1 (Read/Write)

Hysteresis Reg CH1 (Read/Write)

DATALOW Reg CH2 (Read/Write)

DATAHIGH Reg CH2 (Read/Write)

Hysteresis Reg CH2 (Read/Write)

DATALOW Reg CH3 (Read/Write)

DATAHIGH Reg CH3 (Read/Write)

Hysteresis Reg CH3 (Read/Write)

DATALOW Reg CH4 (Read/Write)

DATAHIGH Reg CH4 (Read/Write)

Hysteresis Reg CH4 (Read/Write)

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