MC9328MX1 datasheet(2/96 Pages) FREESCALE

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MC9328MX1 Advance Information, Rev. 4

Freescale Semiconductor

Introduction

Figure 1. MC9328MX1 Functional Block Diagram

1.1 Conventions

This document uses the following conventions:

•

OVERBAR is used to indicate a signal that is active when pulled low: for example, RESET.

•

Logic level one is a voltage that corresponds to Boolean true (1) state.

•

Logic level zero is a voltage that corresponds to Boolean false (0) state.

•To set a bit or bits means to establish logic level one.

•To clear a bit or bits means to establish logic level zero.

•A signal is an electronic construct whose state conveys or changes in state convey information.

•A pin is an external physical connection. The same pin can be used to connect a number of signals.

•

Asserted means that a discrete signal is in active logic state.

— Active low signals change from logic level one to logic level zero.

— Active high signals change from logic level zero to logic level one.

•

Negated means that an asserted discrete signal changes logic state.

— Active low signals change from logic level zero to logic level one.

— Active high signals change from logic level one to logic level zero.

•

LSB means least significant bit or bits, and MSB means most significant bit or bits. References to low and

high bytes or words are spelled out.

•

Numbers preceded by a percent sign (%) are binary. Numbers preceded by a dollar sign ($) or 0x are

hexadecimal.

Watchdog

GPIO

LCD Controller

JTAG/ICE

CGM

Timer 1 & 2

PWM

Standard

Bootstrap

Connectivity

System Control

I2C

MMC/SD

SPI 1 and

UART 1

UART 2 & 3

USB Device

SmartCard I/F

Bluetooth

Memory Stick®

SSI/I2S 1 & 2

Analog Signal

Human Interface

Video Port

Multimedia

Power

RTC

Bus

DMAC

Interrupt

VMMU

CPU Complex

I Cache

AIPI 1

AIPI 2

D Cache

eSRAM

EIM &

ARM9TDMI™

System I/O

Control

(DPLLx2)

Controller

Control

(11 Chnl)

(128K)

SDRAMC

Accelerator

Processor

SPI 2

Host Controller

MC9328MX1

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