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A6985F Folha de dados(PDF) 44 Page - STMicroelectronics |
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A6985F Folha de dados(HTML) 44 Page - STMicroelectronics |
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44 / 77 page ![]() Closing the loop A6985F 44/77 DocID027738 Rev 2 6.5 Compensation network design The maximum bandwidth of the system can be designed up to fSW/6 or up to 150 kHz to guarantee a valid small signal model. Equation 34 Equation 35 where gCS represents the current sense transconductance (see Table 5: Electrical characteristics on page 8) and gm TYP the error amplifier transconductance. Equation 36 Example 2 Considering A6985F3V3, VIN = 12 V, L = 4.7 H, COUT = 10 F, fSW = 2 MHz. Assuming to design the compensation network to achieve a system bandwidth of 110 kHz: Equation 37 Equation 38 so accordingly with Equation 35 and Equation 36: Equation 39 Equation 40 BW min fSW 6 --------- 150kHz = RC 2 BW C OUT VOUT 0.85V gCS gm TYP ---------------------------------------------------------------- = CC 5 2 R C BW -------------------------------------- = fPOLE 2. ·· 4kHz = RLOAD VOUT IOUT -------------- 6.6 == RC 107k 110k = CC 66pF 68pF = |
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