LTC3602 datasheet(8/28 Pages) LINER

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LTC3633A-2/LTC3633A-3

3633a23f

PIN FUNCTIONS

PGOOD1 (Pin 1/Pin 4): Channel 1 Open-Drain Power

Good Output Pin. PGOOD1 is pulled to ground when the

voltage on the VFB1 pin is not within ±8% (typical) of the

internal 0.6V reference. PGOOD1 becomes high imped-

ance once the VFB1 pin returns to within ±5% (typical) of

the internal reference.

PHMODE (Pin 2/Pin 5): Phase Select Input. Tie this pin

to ground to force both channels to switch in phase. Tie

this pin to INTVCC to force both channels to switch 180°

out of phase. Do not ﬂoat this pin.

RUN1 (Pin 3/Pin 6): Channel 1 Regulator Enable Pin.

Enables channel 1 operation by tying RUN1 above 1.22V.

Tying it below 1V places channel 1 into shutdown. Do not

ﬂoat this pin.

MODE/SYNC (Pin 4/Pin 7): Mode Select and External

Synchronization Input. Tie this pin to ground to force

continuous synchronous operation at all output loads.

Floating this pin or tying it to INTVCC enables high efﬁ-

ciency Burst Mode operation at light loads. Drive this pin

with a clock to synchronize the LTC3633A-2 switching.

An internal phase-locked loop will force the bottom power

NMOS’s turn on signal to be synchronized with the rising

edge of the CLKIN signal. When this pin is driven with a

clock, forced continuous mode is automatically selected.

RT (Pin 5/Pin 8): Oscillator Frequency Program Pin.

Connect an external resistor (between 80k to 640k) from

this pin to SGND in order to program the frequency from

500kHz to 4MHz. When RT is tied to INTVCC, the switching

frequency will default to 2MHz.

RUN2 (Pin 6/Pin 9): Channel 2 Regulator Enable Pin.

Enables channel 2 operation by tying RUN2 above 1.22V.

Tying it below 1V places channel 2 into shutdown. Do not

ﬂoat this pin.

SGND (Pin 7/Pin 10): Signal Ground Pin. This pin should

have a low noise connection to reference ground. The

feedback resistor network, external compensation network,

and RT resistor should be connected to this ground.

PGOOD2 (Pin 8/Pin 11): Channel 2 Open-Drain Power

Good Output Pin. PGOOD2 is pulled to ground when the

voltage on the VFB2 pin is not within ±8% (typical) of the

internal 0.6V reference. PGOOD2 becomes high imped-

ance once the VFB2 pin returns to within ±5% (typical) of

the internal reference.

VFB2 (Pin 9/Pin 12): Channel 2 Output Feedback Voltage

Pin. Input to the error ampliﬁer that compares the feedback

voltage to the internal 0.6V reference voltage. Connect this

pin to a resistor divider network to program the desired

output voltage.

TRACKSS2 (Pin 10/Pin 13): Output Tracking and Soft-

Start Input Pin for Channel 2. Forcing a voltage below

0.6V on this pin bypasses the internal reference input to

the error ampliﬁer. The LTC3633A-2 will servo the FB pin

to the TRACK voltage under this condition. Above 0.6V,

the tracking function stops and the internal reference

resumes control of the error ampliﬁer. An internal 1.4μA

pull up current from INTVCC allows a soft start function

to be implemented by connecting a capacitor between

this pin and SGND.

ITH2 (Pin 11/Pin 14): Channel 2 Error Ampliﬁer Output

and Switching Regulator Compensation Pin. Connect this

pin to appropriate external components to compensate

the regulator loop frequency response. Connect this pin

to INTVCC to use the default internal compensation.

VON2 (Pin 12/Pin 15): On-Time Voltage Input for Chan-

nel 2. This pin sets the voltage trip point for the on-time

comparator. Tying this pin to the output voltage makes

the on-time proportional to VOUT2 when VOUT2 is within

the VON2 sense range (0.6V – 6V for LTC3633A-2, 1.5V

– 12V for LTC3633A-3). When VOUT2 is outside the VON2

sense range, the switching frequency may deviate from

the programmed frequency. The pin impedance is nomi-

nally 140kΩ.

SW2 (Pins 13, 14/Pins 16, 17): Channel 2 Switch Node

Connection to External Inductor. Voltage swing of SW is

from a diode voltage drop below ground to PVIN.

PVIN2 (Pins 15, 16/Pins 18, 19): Power Supply Input for

Channel 2. Input voltage to the on chip power MOSFETs

on channel 2. This input is capable of operating from a

different supply voltage than PVIN1.

(QFN/TSSOP)

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