SPEAR1310 datasheet(48/57 Pages) STMICROELECTRONICS

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General purpose timer (GPT)

SPEAr1310

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Doc ID 17528 Rev 4

General purpose timer (GPT)

General purpose timers can be used for precise timing measurement and for measurement

of frequency of any input signal. They are essentially counters that increment based on the

clock cycle and the timer prescaler. An application can monitor these counters to determine

how much time has elapsed. GPT can have timer and capture mode capabilities.

32.1

Main features

●

It is constituted by 2 channels; each one consists of a programmable 16-bit counter and

a dedicated 8-bit timer clock prescaler

●

The programmable 8-bit prescaler unit performs a clock division by 1, 2, 4, 8, 16, 32,

64, 128, and 256

●

Three interrupt sources (MATCH, REDG, and FEDG) are available for each timer

channel. They are mapped to a single interrupt line for each channel but may be

individually masked and acknowledged

●

Each timer has a separate register set to control, enable and run each channel

separately

●

Three modes of operations are available for each timer channel:

–

Auto-reload mode

–

Single-shot mode

–

Capture function

Auto-reload mode

When the timer is enabled, the counter is cleared and starts incrementing. When it reaches

the compare register value, an interrupt source is activated, the counter is automatically

cleared and restarts incrementing. The process is repeated until the timer is disabled.

Single-shot mode

When the timer is enabled, the counter is cleared and starts incrementing. When it reaches

the compare register value, an interrupt source is activated, the counter stopped and the

timer disabled.

Capture function

This function is provided for the measurement of input timing signals. After being initialized,

when a rising transition occurs at the GPTx_TMR_CAPX (x =1,2 depending upon the timer

used)(X =1,2 depending upon the channel used for the timer) input, the actual counter

value is stored into the rising edge capture register In the same way, when a falling edge

transition occurs at the CAPT input, the actual counter value is stored into the falling edge

capture register. You can read the value stored in the two capture registers and compute the

duration of the rising to falling edge (or vice versa) time interval.

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