HD64F2149YV datasheet(1015/1075 Pages) RENESAS

1015 / 1075 page

Appendix B Internal I/O Registers

Rev. 3.00 Jan 18, 2006 page 987 of 1044

REJ09B0280-0300

TCONRO—Timer Connection Register O

H'FFFD

Timer Connection

Bit

Initial value

Read/Write

HOE

R/W

VOE

R/W

CLOE

R/W

CBOE

R/W

HOINV

R/W

CBOINV

R/W

VOINV

R/W

CLOINV

R/W

Output synchronization

signal inversion

The CBLANK signal is

used directly as the

CBLANK output

The CBLANK signal is

inverted before use as

the CBLANK output

Output synchronization signal inversion

The CLO signal (CL1, CL2, CL3,

or CL4 signal) is used directly as

the CLAMPO output

The CLO signal (CL1, CL2, CL3,

or CL4 signal) is inverted before

use as the CLAMPO output

Output synchronization signal inversion

The IVO signal is used directly as

the VSYNCO output

The IVO signal is inverted before

use as the VSYNCO output

Output synchronization signal inversion

The IHO signal is used directly as the HSYNCO output

The IHO signal is inverted before use as the HSYNCO output

Output enable

The P27/A15/PW15/CBLANK pin functions as the P27/A15/PW15 pin

In mode 1 (expanded mode with on-chip ROM disabled):

The P27/A15/PW15/CBLANK pin functions as the A15 pin

In modes 2 and 3 (expanded modes with on-chip ROM enabled):

The P27/A15/PW15/CBLANK pin functions as the CBLANK pin

Output enable

The P64/FTIC/

KIN4/CIN4/CLAMPO pin functions as the P64/FTIC/KIN4/CIN4 pin

The P64/FTIC/

KIN4/CIN4/CLAMPO pin functions as the CLAMPO pin

Output enable

The P61/FTOA/

KIN1/CIN1/VSYNCO pin functions as the P61/FTOA/KIN1/CIN1 pin

The P61/FTOA/

KIN1/CIN1/VSYNCO pin functions as the VSYNCO pin

Output enable

The P44/TMO1/HIRQ1/HSYNCO pin functions as the P44/TMO1/HIRQ1 pin

The P44/TMO1/HIRQ1/HSYNCO pin functions as the HSYNCO pin

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