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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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HD64F2149YV Folha de dados(PDF) 1014 Page - Renesas Technology Corp |
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HD64F2149YV Folha de dados(HTML) 1014 Page - Renesas Technology Corp |
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1014 / 1075 page  Appendix B Internal I/O Registers Rev. 3.00 Jan 18, 2006 page 986 of 1044 REJ09B0280-0300 TCONRI—Timer Connection Register I H'FFFC Timer Connection Bit Initial value Read/Write 7 SIMOD1 0 R/W 6 SIMOD0 0 R/W 5 SCONE 0 R/W 4 ICST 0 R/W 3 HFINV 0 R/W 0 VIINV 0 R/W 2 VFINV 0 R/W 1 HIINV 0 R/W Input synchronization mode select 1 and 0 0 1 No signal S-on-G mode Composite mode Separate mode 0 1 0 1 SIMOD1 Mode HFBACKI input CSYNCI input HSYNCI input HSYNCI input IHI signal VFBACKI input PDC input PDC input VSYNCI input IVI signal SIMOD0 Synchronization signal connection enable 0 1 FTIA input Normal connection SCONE FTIA FTIB FTIC FTID TMCI1 TMRI1 Mode FTIB input FTIC input TMCI1 input TMRI1 input FTID input IVI signal Synchronization signal connec- tion mode TMO1 signal VFBACKI input IHI signal IVI inverse signal IHI signal Input synchronization signal inversion 0 The VSYNCI pin state is used directly as the VSYNCI input 1 The VSYNCI pin state is inverted before use as the VSYNCI input Input synchronization signal inversion 0 The HSYNCI and CSYNCI pin states are used directly as the HSYNCI and CSYNCI inputs 1 The HSYNCI and CSYNCI pin states are inverted before use as the HSYNCI and CSYNCI inputs Input synchronization signal inversion 0 The VFBACKI pin state is used directly as the VFBACKI input 1 The VFBACKI pin state is inverted before use as the VFBACKI input Input capture start bit 0 The TICRR and TICRF input capture functions are stopped [Clearing condition] When a rising edge followed by a falling edge is detected on TMRIX 1 The TICRR and TICRF input capture functions are operating (Waiting for detection of a rising edge followed by a falling edge on TMRIX) [Setting condition] When 1 is written in ICST after reading ICST = 0 Input synchronization signal inversion 0 The HFBACKI pin state is used directly as the HFBACKI input 1 The HFBACKI pin state is inverted before use as the HFBACKI input |
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