HD64F2149YV datasheet(972/1075 Pages) RENESAS

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Appendix B Internal I/O Registers

Rev. 3.00 Jan 18, 2006 page 944 of 1044

REJ09B0280-0300

TCSR—Timer Control/Status Register

H'FF91

FRT

ICFA

R/(W)*

ICFB

R/(W)*

ICFC

R/(W)*

ICFD

R/(W)*

OCFA

R/(W)*

CCLRA

R/W

OCFB

R/(W)*

OVF

R/(W)*

Bit

Initial value

Read/Write

Input capture flag A

Note: *

Only 0 can be written in bits 7 to 1, to clear the flags.

[Clearing condition]

Read ICFA when ICFA = 1, then write 0 in ICFA

[Setting condition]

When an input capture signal causes the FRC value to be transferred to ICRA

Input capture flag B

[Clearing condition]

Read ICFB when ICFB = 1, then write 0 in ICFB

[Setting condition]

When an input capture signal causes the FRC value to be transferred to ICRB

Input capture flag C

[Clearing condition]

Read ICFC when ICFC = 1, then write 0 in ICFC

[Setting condition]

When an input capture signal is received

Input capture flag D

[Clearing condition]

Read ICFD when ICFD = 1, then write 0 in ICFD

[Setting condition]

When an input capture signal is received

Counter clear A

FRC clearing is

disabled

FRC is cleared at

compare match A

Timer overflow flag

[Clearing condition]

Read OVF when OVF = 1,

then write 0 in OVF

[Setting condition]

When FRC changes from

H'FFFF to H'0000

Output compare flag B

[Clearing condition]

Read OCFB when OCFB = 1, then write 0 in OCFB

[Setting condition]

When FRC = OCRB

Output compare flag A

[Clearing condition]

Read OCFA when OCFA = 1, then write 0 in OCFA

[Setting condition]

When FRC = OCRA

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