HD64F2149YV datasheet(971/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Appendix B Internal I/O Registers

Rev. 3.00 Jan 18, 2006 page 943 of 1044

REJ09B0280-0300

TIER—Timer Interrupt Enable Register

H'FF90

FRT

ICIAE

R/W

ICIBE

R/W

ICICE

R/W

ICIDE

R/W

OCIAE

R/W

—

OCIBE

R/W

OVIE

R/W

Bit

Initial value

Read/Write

Input capture interrupt A enable

Input capture interrupt request A (ICIA) is disabled

Input capture interrupt request A (ICIA) is enabled

Input capture interrupt B enable

Input capture interrupt request B (ICIB) is disabled

Input capture interrupt request B (ICIB) is enabled

Input capture interrupt C enable

Input capture interrupt request C (ICIC) is disabled

Input capture interrupt request C (ICIC) is enabled

Input capture interrupt D enable

Input capture interrupt request D (ICID) is disabled

Input capture interrupt request D (ICID) is enabled

Output compare interrupt A enable

Output compare interrupt request A

(OCIA) is disabled

Output compare interrupt request A

(OCIA) is enabled

Output compare interrupt B enable

Output compare interrupt

request B (OCIB) is disabled

Output compare interrupt

request B (OCIB) is enabled

Timer overflow interrupt enable

Timer overflow interrupt

request (FOVI) is disabled

Timer overflow interrupt

request (FOVI) is enabled

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