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HD64F2149YV Folha de dados(PDF) 828 Page - Renesas Technology Corp |
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HD64F2149YV Folha de dados(HTML) 828 Page - Renesas Technology Corp |
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828 / 1075 page ![]() Section 25 Electrical Characteristics Rev. 3.00 Jan 18, 2006 page 800 of 1044 REJ09B0280-0300 SDA0, SDA1 VIL VIH tBUF P* P* S* tSTAH tSCLH tSr tSCLL tSCL tSf tSDAH Sr* tSDAS tSTAS tSP tSTOS Note: * S, P, and Sr indicate the following conditions. S: P: Sr: Start condition Stop condition Retransmission start condition SCL0, SCL1 Figure 25.27 I 2C Bus Interface Input/Output Timing Table 25.11 LPC Module Timing Conditions: V CC = 3.0 V to 3.6 V, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C Item Symbol Min Max Unit Notes LPC Input clock cycle t Lcyc 30 — ns Figure 25.28 Input clock pulse width t LCKW 0.4 0.6 t Lcyc Transmit signal delay time t TXD — 18 ns Receive signal setup time t RXS 8 — Receive signal hold time t RXH 8 — |
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