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HD64F2149YV Folha de dados(PDF) 826 Page - Renesas Technology Corp |
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HD64F2149YV Folha de dados(HTML) 826 Page - Renesas Technology Corp |
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826 / 1075 page ![]() Section 25 Electrical Characteristics Rev. 3.00 Jan 18, 2006 page 798 of 1044 REJ09B0280-0300 Table 25.9 Keyboard Buffer Controller Timing Conditions: V CC = 2.7 V to 3.6 V, VCCB = 2.7 V to 5.5 V, VSS = 0 V, φ = 2 MHz to maximum operating frequency, T a = –20 to +75°C Ratings Item Symbol Min Typ Max Unit Notes KCLK, KD output fall time t KBF 20 + 0.1Cb — 250 ns Figure 25.26 KCLK, KD input data hold time t KBIH 150 —— ns KCLK, KD input data setup time t KBIS 150 —— ns KCLK, KD output delay time t KBOD —— 450 ns KCLK, KD capacitive load C b —— 400 pF 1. Reception φ KCLK/ KD* KCLK/ KD* tKBIS tKBIH Transmission (b) tKBF 2. Transmission (a) φ KCLK/ KD* T1 T2 tKBOD Notes: φ shown here is the clock scaled by 1/N when the operating mode is active medium-speed mode. * KCLK: PS2AC to PS2CC KD: PS2AD to PS2CD Figure 25.26 Keyboard Buffer Controller Timing |
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