HD64F2149YV datasheet(353/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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Section 11 16-Bit Free-Running Timer

Rev. 3.00 Jan 18, 2006 page 325 of 1044

REJ09B0280-0300

Bit 3—Output Enable A (OEA): Enables or disables output of the output compare A signal

(FTOA).

Bit 3

OEA

Description

Output compare A output is disabled

(Initial value)

Output compare A output is enabled

Bit 2—Output Enable B (OEB): Enables or disables output of the output compare B signal

(FTOB).

Bit 2

OEB

Description

Output compare B output is disabled

(Initial value)

Output compare B output is enabled

Bit 1—Output Level A (OLVLA): Selects the logic level to be output at the FTOA pin in

response to compare-match A (signal indicating a match between the FRC and OCRA values).

When the OCRAMS bit is 1, this bit is ignored.

Bit 1

OLVLA

Description

0 output at compare-match A

(Initial value)

1 output at compare-match A

Bit 0—Output Level B (OLVLB): Selects the logic level to be output at the FTOB pin in

response to compare-match B (signal indicating a match between the FRC and OCRB values).

Bit 0

OLVLB

Description

0 output at compare-match B

(Initial value)

1 output at compare-match B

HD64F2149YV Folha de dados(PDF) 353 Page - Renesas Technology Corp