AS3418 datasheet(65/78 Pages) AMSOSRAM

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AS3418

Datasheet

• PUBLIC

DS000507

• v4-00 • 2020-Jan-23

│ 64

Addr: 0x14

PBO_MIC_RIGHT_GAIN

Bit

Bit Name

Default

Access

Bit Description

000 0011: 1.5dB gain

…

011 1110: 31dB gain

011 1111: do not use

101 0111: MUTE (Mute code if NEG_ATT_EN bit

set)

111 1111: MUTE (Mute code if NEG_ATT_EN bit

not set)

7.2.5

AGC Control Registers

Figure 88:

AGC_CONTROL0 Register Description

Addr: 0x15

AGC_CONTROL0

Bit

Bit Name

Default

Access

Bit Description

ZERO_CROS

S_EN

R/W

This register disables the zero cross detection

function of the AGC.

0: Zero cross detection disabled

1: Zero cross detection enabled

6:5

ATTACK_LEV

R/W

This register controls the attack level threshold

voltage of the AGC.

00: 0.277* VBAT attack level

01: 0.333* VBAT attack level

10: 0.395* VBAT attack level

11: 0.463* VBAT attack level

4:3

RELEASE_LE

VEL

R/W

This register controls the release level threshold

voltage of the AGC.

00: 0.200* VBAT release level

01: 0.250* VBAT release level

10: 0.304* VBAT release level

11: 0.364* VBAT release level

AGC_MUTE_

R/W

This bit enables the mute function for the automatic

gain control.

0: AGC mute function disabled

1: AGC mute function enabled

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