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AS3418 Folha de dados(PDF) 45 Page - ams-OSRAM AG |
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AS3418 Folha de dados(HTML) 45 Page - ams-OSRAM AG |
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45 / 78 page ![]() Document Feedback AS3418 Functional Description Datasheet • PUBLIC DS000507 • v4-00 • 2020-Jan-23 77 │ 44 For reading data from the slave device, the master has to change the transfer direction. This can be done either with a repeated START condition followed by the device-read address, or simply with a new transmission START followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed by the 1st register byte transmitted from the slave. In Read Mode any number of subsequent register bytes can be read from the slave. The word address is incremented internally. Figure 61: Random Read Random Read and Sequential Read are combined formats. The repeated START condition is used to change the direction after the data transfer from the master. The word address transfer is initiated with a START condition issued by the master while the bus is idle. The START condition is followed by the device-write address and the word address. In order to change the data direction a repeated START condition is issued on the 1st SCL pulse after the acknowledge bit of the word address transfer. After the reception of the device-read address, the slave becomes the transmitter. In this state the slave transmits register data located by the previous received word address vector. The master responds to the data byte with a not-acknowledge, and issues a STOP condition on the bus. Figure 62: Sequential Read Sequential Read is the extended form of Random Read, as more than one register-data bytes are transferred subsequently. Different from the Random Read, for a sequential read, the transferred register-data bytes are responded with an acknowledge from the master. The number of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). To terminate the transmission the master has to send a not-acknowledge following the last data byte and then generate the STOP condition. A DW S WA A Sr P DR A data N RA++ A DW S WA A Sr DR A reg_data 1 A reg_data 2 A ... reg_data n RA++ RA++ RA++ P N |
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