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AS3418 Folha de dados(PDF) 41 Page - ams-OSRAM AG |
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AS3418 Folha de dados(HTML) 41 Page - ams-OSRAM AG |
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41 / 78 page ![]() Document Feedback AS3418 Functional Description Datasheet • PUBLIC DS000507 • v4-00 • 2020-Jan-23 77 │ 40 The EEPROM supports three operation modes: ● Upload Operation - The Upload function copies the register content of register 0x01 – 0x1D and stores it permanently to the EEPROM. ● Download Operation - The Download function copies the permanently stored EEPROM content to the registers of AS3418 and overwrites the existing register content with the EEPROM values like it happens during startup of the device. ● TEST UPLOAD - The Test Upload function is a feature to trigger a test EEPROM upload. During this test the device does not write the EEPROM settings, instead it just tries if it would be possible to write the EEPROM successfully. It is recommended to perform this test each time before a real EEPROM upload is triggered. 6.10.1 EEPROM Download Function In order to trigger an EEPROM Download function (copy EEPROM content to AS3418 system registers) the EEPROM_DOWNLOAD bit has to be set in register 0x34. Once the bit is set via I2C interface or the production trimming interface the EE_READY bit in register 0x01 can be checked if the download of the EEPROM content is finished. As long as the EE_READY bit is zero the download process is ongoing. Once the bit is set the download process is completed. A flow chart of the download is shown in Figure 53. Figure 53: EEPROM Download Flow Chart 6.10.2 EEPROM Upload Function An EEPROM Upload function can be simply triggered by setting the EEPROM_UPLOAD bit in register 0x34. Once the bit is set, the EE_READY bit has to be monitored to check the status of the EEPROM. If the Upload function is completed the EE_READY bit is set and the next step in the upload sequence is to check the EE_WR_OK bit in the same register 0x01. If the upload process was successfully completed the bit is set to ‘1’. In case the upload failed the bit is set to ‘0’. The flow chart for the EEPROM Upload sequence is shown in Figure 54. Set bit EEPROM_DOWNLOAD in register 0x34 EEPROM Download complete Check EE_READY bit in register 0x01 EE_READY = 0 EE_READY = 1 |
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