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CC1010-RTY1 Folha de dados(PDF) 113 Page - Texas Instruments

Nome de Peças CC1010-RTY1
Descrição Electrónicos  Single Chip Very Low Power RF Transceiver with 8051-Compatible Microcontroller
PDF  150 Pages
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Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
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CC1010-RTY1 Folha de dados(HTML) 113 Page - Texas Instruments

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CC1010
SWRS047A
Page 113 of 146
17.15 VCO
Only one external inductor (L101) is
required for the VCO. The inductor will
determine the operating frequency range
of the circuit. It is important to place the
inductor as close to the pins as possible in
order to reduce stray inductance. It is
recommended to use a high Q, low
tolerance inductor for best performance.
Typical tuning range for the integrated
varactor is 20-25%.
Component values for various frequencies
are given in Table 28. Component values
for other frequencies can be found using
the SmartRF
® Studio software.
17.16 VCO and PLL self-calibration
To
compensate
for
supply
voltage,
temperature and process variations the
VCO and PLL must be calibrated. The
calibration is done automatically and sets
optimum VCO tuning range and optimum
charge pump current for PLL stability. The
calibration is controlled by using the CAL
register.
After setting up the device at the operating
frequency, the TEST6 register must be
programmed (depend on operation mode).
Then the self-calibration is initiated by
setting
the
CAL.CAL_START
bit.
The
calibration result is stored internally in the
chip, and is valid as long as power is not
turned
off.
If
large
supply
voltage
variations
(more
than
0.5
V)
or
temperature variations (more than 40
degrees) occur after calibration, a new
calibration should be performed. For more
details on the calibration data, see the
description
for
test
and
calibration
registers page 128.
When CAL.CAL_WAIT = 1 the calibration
is complete and the CAL.CAL_COMPLETE
flag is set after 25650 reference clock
cycles
(fREF,
see
the
Frequency
programming section at page 106). The
user can poll this bit, or simply wait 25650
reference
clock
cycles.
The
lowest
permitted reference frequency (1 MHz)
gives a wait time of 25.65 ms, which is the
worst case. Some calibration times for
different reference frequencies are listed in
Table 36. When CAL.CAL_WAIT = 0 it
takes
12825
cycles,
but
this
is
not
recommended.
Reference frequency
[MHz]
Calibration time
[ms]
2.4
10.69
2.0
12.83
1.5
17.10
1.0
25.65
Table 36. Calibration times
The CAL_START bit must be cleared after
the calibration is done. This will also clear
the CAL.CAL_COMPLETE status bit.
There are separate calibration values for
the two frequency registers. If the two
frequencies, A and B, differ more than 1
MHz, or different VCO currents are used
(CURRENT.VCO_CURRENT(3:0)),
the
calibration should be done separately.
When using a 10.7 MHz external IF the LO
is 10.7 MHz below/above the transmit
frequency,
hence
separate
calibration
must be done. The CAL.CAL_DUAL bit
controls dual or separate calibration.
The single frequency calibration algorithm
using separate calibration for RX and TX
frequency is illustrated in Figure 34.
In Figure 35 the dual calibration algorithm
is shown for two RX frequencies. It could
also be used for two TX frequencies, or
even for one RX and one TX frequency if
the same VCO current is used.
In multi-channel and frequency hopping
applications the PLL calibration values
may be read and stored for later use. By
reading
back
calibration
values
and
frequency change can be done without
doing a re-calibration which could take up
to 25 ms. After a calibration is completed,



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