| Os motores de busca de Datasheet de Componentes eletrônicos |
|
ADIN1101BCPZ-R7 Folha de dados(PDF) 71 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADIN1101BCPZ-R7 Folha de dados(HTML) 71 Page - Analog Devices |
|
71 / 79 page ![]() Data Sheet ADIN1101 REGISTER SUMMARY analog.com Rev. A | 71 of 79 Table 120. Bit Descriptions for PHY_SUBSYS_IRQ_MASK (Continued) Bits Bit Name Description Reset Access 12 RESERVED Reserved. 0x0 R/W 11 AN_STAT_CHNG_IRQ_EN Enable Autonegotiation Status Change Interrupt. 0x0 R/W [10:2] RESERVED Reserved. 0x100 R/W 1 LINK_STAT_CHNG_IRQ_EN Enable Link Status Change Interrupt. 0x1 R/W 0 RESERVED Reserved. 0x0 R/W Frame Checker Enable Register Device Address: 0x1F; Register Address: 0x8001, Reset: 0x0001, Name: FC_EN This register is used to enable the frame checker. The frame checker analyzes the received frames from either the MAC interface or the PHY (see the FC_TX_SEL register) to report the number of frames received, CRC errors, and various other frame errors. The frame checker frame and error counter registers count these events. Table 121. Bit Descriptions for FC_EN Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 FC_EN Frame Checker Enable. Set to 1 to enable the frame checker. 0x1 R/W Frame Checker Interrupt Enable Register Device Address: 0x1F; Register Address: 0x8004, Reset: 0x0001, Name: FC_IRQ_EN This register is used to enable the frame checker interrupt. An interrupt is generated when a receive error occurs. Enable the frame checker/generator interrupt in the PHY_SUBSYS_IRQ_MASK register. Set the MAC_IF_FC_FG_IRQ_EN bit. The status can be read via the MAC_IF_FC_FG_IRQ_LH bit in the PHY_SUBSYS_IRQ_STATUS register. Table 122. Bit Descriptions for FC_IRQ_EN Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 FC_IRQ_EN Frame Checker Interrupt Enable. When set, this bit enables the frame checker interrupt. 0x1 R/W Frame Checker Transmit Select Register Device Address: 0x1F; Register Address: 0x8005, Reset: 0x0000, Name: FC_TX_SEL This register is used to select the transmit side or receive side for frames to be checked. If set, frames received from the MAC interface to be transmitted are checked. The frame checker can be used to verify that correct data is received over the MAC interface and is also useful if remote loopback is enabled (see the MAC_IF_REM_LB_EN bit in the MAC_IF_LOOPBACK register) because it can be used to check the received data after it is looped back at the MAC interface. Table 123. Bit Descriptions for FC_TX_SEL Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 FC_TX_SEL Frame Checker Transmit Select. When set, this bit indicates that the frame checker must check frames received to be transmitted by the PHY. 0x0 R/W 1: check frames from the MAC interface to be transmitted by the PHY. 0: check frames received by the PHY from the remote end. |
|
Ligação URL |
| ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | Link para a ficha técnica | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |