ADL8113ACCZ-R7 datasheet(36/37 Pages) AD

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Data Sheet

ADL8113

APPLICATIONS INFORMATION

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Rev. 0 | 36 of 37

RECOMMENDED POWER MANAGEMENT

CIRCUIT

Figure 122 shows a recommended power management circuit that

uses MAX1697 inverting charge pump, MAX17651 linear regulator,

and LT3042 linear regulator. The LT3042 linear regulator is used to

step down the 12V input voltage to a low noise 5V output to the

VDD PA pin of the ADL8113 evaluation board.

The output voltage (VOUT) for the LT3042 is set by the R4 resistor

connected to the SET pin, according to the following equation:

R4 = (VOUT/100μA)

(1)

The PGFB resistors (R5 and R6) are chosen to trigger the power-

good (PG) signal when the output is just under 95% of the target

voltage of 5V. The output of the LT3042 has 1% initial tolerance

and another 1% variation over temperature. The PGFB tolerance is

roughly 3% over temperature and by adding resistors it results in a

bit more (5%); therefore, putting 5% between the output and PGFB

works well. In addition, the PG open collector is pulled up to the 5V

output to give a convenient 0V to 5V voltage range.

The MAX17651 linear regulator is used to provide a +3.3V input

voltage to the MAX1697 inverting charge pump and a +3.3V output

voltage to the VDD_SW pin of the ADL8113 evaluation board. The

switching frequency for the MAX1697 is set to 250kHz by the 1μF

capacitor, which sets the minimum output resistance to 12Ω. The

MAX1697 data sheet provides a table of capacitor values that can

be used to select other switching frequencies ranging from 12kHz

to 250kHz.

The output voltage (VOUT) for the MAX17651 is set by the R1 and

R2 resistors connected to the OUT and FB pins, according to the

following equation:

R1 = R2 × (((Input Voltage (VIN)/VOUT) − 1))

Figure 122. Power Management Circuit Schematic

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