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S32K311NHT0MPAST Folha de dados(PDF) 97 Page - NXP Semiconductors |
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S32K311NHT0MPAST Folha de dados(HTML) 97 Page - NXP Semiconductors |
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97 / 143 page  Table 49. Timing specification for S32K388 to S32K388 communication (continued) Symbol Description Min Typ Max Unit Condition Spec Number tHO Output hold time -15 — — ns Master mode output 11 tLEAD Enable lead time (PCS to SPSCK delay) 30 — — ns Master mode 3 tA Slave access time — — 50 ns — — tDIS Slave MISO (SOUT) disable time — — 50 ns — — tLAG Enable lag time (After SPSCK delay) 30 — — ns — — 12.5 I2C See I/O parameters for I2C specification. "For supported baud rate see section 'Chip-specific LPI2C information' of the Reference Manual." 12.6 FlexCAN characteristics See I/O parameters for FlexCAN specification. "For supported baud rate, see section 'Protocol timing' of the Reference Manual." 12.7 SAI electrical specifications 12.7.1 SAI Electrical Characteristics, Slave Mode The following table describes the SAI electrical characteristics. Measurements are with maximum output load of 30pF, input transition of 1ns and pad configured with DSE = 1'b1 and SRE = 1'b0. I/O operating voltage ranges from 2.97 V to 3.63 V. Valid pin combinations to be referred from K3xx*_Use sheet in IOmux. Table 50. SAI Electrical Characteristics, Slave Mode Symbol Description Min Typ Max Unit Condition Spec Number S13 SAI_BCLK cycle time (input) 80 — — ns — — S14 SAI_BCLK pulse width high/low (input) 1 45 — 55 % — — S15 SAI_RXD input setup before SAI_BCLK 8 — — ns — — S16 SAI_RXD input hold after SAI_BCLK 2 — — ns — — Table continues on the next page... NXP Semiconductors Communication interfaces S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 97 / 143 |
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