WM8591GEDSSLASHV datasheet(32/51 Pages) WOLFSON

Nome de Peças	WM8591GEDS/V

Descrição Electrónicos	24-bit, 192kHz Stereo CODEC

PDF	51 Pages

Scroll/Zoom	100%

Fabricante Electrônico	WOLFSON [Wolfson Microelectronics plc]

Página de início	http://www.wolfsonmicro.com

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32 / 51 page

WM8591

Production Data

PD Rev 4.0 December 2005

ADC/DAC SYNCHRONIZATION

The WM8591 has a range of features which can be configured to enhance the performance of the

ADC and DAC when operated simultaneously.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADCMCLKINV

ADCMCLK Polarity:

0: non-inverted

1: inverted

R11 (0Bh)

ADC Interface

Control

DACSYNCEN

Enable the DAC Synchronizer:

0: Disabled

1: Enabled

ADCSYNCEN

Enable the ADC Synchronizer:

0: Disabled

1: Enabled

ADCMCLK2DAC

Set both ADC and DAC to use ADCMCLK:

0: DAC uses DACMCLK

1: DAC uses ADCMCLK

ADCMCLKX2

Allows DAC synchronizer to synchronize to ADC operating at

2x DAC rate:

0: Disabled

1: Enabled

DACMCLKINV

DACMCLK Polarity:

0: non-inverted

1: inverted

DACMCLKX2

Allows ADC synchronizer to synchronize to DAC operating at

2x ADC rate:

0: Disabled

1: Enabled

R28 (1Ch)

0011100

ADC/DAC

Synchronization

DACMCLK2ADC

Set both DAC and ADC to use DACMCLK:

0: ADC uses ADCMCLK

1: ADC uses DACMCLK

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