SC1100 datasheet(71/348 Pages) NSC

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SuperI/O Module (Continued)

Table 4-3 provides the bit definitions for the Standard Con-

figuration registers.

• All reserved bits return 0 on reads, except where noted

otherwise. They must not be modified as such modifica-

tion may cause unpredictable results. Use read-modify-

write to prevent the values of reserved bits from being

changed during write.

• Write only registers should not use read-modify-write

during updates.

Table 4-3. Standard Configuration Registers

Bit

Description

Index 07h

Logical Device Number (R/W)

Width: Byte

This register selects the current logical device. See Table 4-2 for valid numbers. All other values are reserved.

7:0

Logical Device Number.

Index 20h-2Fh

SIO Configuration (R/W)

Width: Byte

SIO configuration and ID registers. See Section 4.4.1 "SIO Control and Configuration Registers" on page 73 for register/bit details.

Index 30h

Activate (R/W)

Width: Byte

7:1

Reserved.

Logical Device Activation Control.

Disable

Enable

Index 60h

I/O Port Base Address Bits [15:8] Descriptor 0 (R/W)

Width: Byte

Indicates selected I/O lower limit address bits [15:8] for I/O Descriptor 0.

Index 61h

I/O Port Base Address Bits [7:0] Descriptor 0 (R/W)

Width: Byte

Indicates selected I/O lower limit address bits [7:0] for I/O Descriptor 0.

Index 62h

I/O Port Base Address Bits [15:8] Descriptor 1 (R/W)

Width: Byte

Indicates selected I/O lower limit address bits [15:8] for I/O Descriptor 1.

Index 63h

I/O Port Base Address Bits [7:0] Descriptor 1 (R/W)

Width: Byte

Indicates selected I/O lower limit address bits [7:0] for I/O Descriptor 1.

Index 70h

Interrupt Number (R/W)

Width: Byte

7:4

Reserved.

3:0

Interrupt Number. These bits select the interrupt number. A value of 1 selects IRQ1, a value of 2 selects IRQ2, etc. (up to

IRQ12).

Note: IRQ0 is not a valid interrupt selection.

Index 71h

Interrupt Request Type Select (R/W)

Width: Byte

Selects the type and level of the interrupt request number selected in the previous register.

7:2

Reserved.

Interrupt Level Requested. Level of interrupt request selected in previous register.

Low polarity.

High polarity.

This bit must be set to 1 (high polarity), except for IRQ8#, that must be low polarity.

Interrupt Type Requested. Type of interrupt request selected in previous register.

Edge.

Level.

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