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CYW2338
PRELIMINARY
8
Table 4. 7-Bit Swallow Counter (A) Truth Table[8]
Divide Ratio A
A7A6
A5A4A3A2
A1
PLL1 (High Frequency)
0
0
0
0000
0
1
0
0
0000
1
:::
:::
:::
:::
:::
:::
:::
:::
126
1
1
1111
0
127
1
1
1111
1
PLL2 (Low Frequency)
0
0
0
0000
0
1
0
0
0000
1
:::
:::
:::
:::
:::
:::
:::
:::
126
1
1
1111
0
127
1
1
1111
1
Table 5. 11-Bit Programmable Counter (B) Truth Table[9]
Divide Ratio B
B11
B10
B9
B8B7B6B5B4B3
B2B1
3
0000
000001
1
4
0000
000010
0
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
2046
1111
111111
0
2047
1111
111111
1
Table 6. 15-Bit Programmable Reference Counter (for PLL1 and PLL2) Truth Table[9]
Divide Ratio R
R15
R14
R13
R12
R11
R10
R9R8R7R6R5R4R3R2R1
3
000000000000011
4
000000000000100
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
:::
32766
111111111111110
32767
111111111111111
Ordering Information[10]
Ordering Code
Package
Name
Package Type
Tape and Reel Option
CYW2338
ZI
BCI
LFI
20-pin Thin Shrink Small Outline Package (0.173” wide)
24-pin Chip Scale Package (3.5 mm X 4.5 mm)
20-pin Micro Lead Frame (4 mm x 4 mm)
TR
Document #: 38-01004-*A
Notes:
8.
B is greater than or equal to A.
9.
Divide ratio less than 3 is prohibited. The divide ratio can be calculated using the following equation:
10. Operating temperature range: –40°C to +85°C.
fvco = {(P * B) + A} * fosc / R where (A < B)
fvco: Output frequency of the external VCO.
The divide ratio N = (P * B) + A.
R: Preset ratio of the 15-bit programmable reference counter (3 to 32767).
fosc: The crystal reference oscillator frequency.
A: Preset divide ratio of the 7-bit swallow counter (0 to 127).
B: Preset ratio of the 11-bit programmable counter (3 to 2047).
P: Preset divide ratio of the dual modulus prescaler (64/65 or 128/129).