STTS2004 datasheet(38/58 Pages) STMICROELECTRONICS

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SPD EEPROM operation

STTS2004

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DocID024229 Rev 3

5.6.2

Current address read

For the Current address read operation, following a Start condition, the bus master only

sends a device select code with the RW bit set to 1. The device acknowledges this, and

outputs the byte addressed by the internal address counter. The counter is then

incremented. The bus master terminates the transfer with a Stop condition, as shown in

Figure 15, without acknowledging the byte.

5.6.3

Sequential read

This operation can be used after a current address read or a random address read. The bus

master does acknowledge the data byte output, and sends additional clock pulses so that

the device continues to output the next byte in sequence. To terminate the stream of bytes,

the bus master must not acknowledge the last byte, and must generate a Stop condition, as

shown in Figure 15.

The output data comes from consecutive addresses, with the internal address counter

automatically incremented after each byte output. After the last memory address, the

address counter ‘rolls-over’, and the device continues to output data from memory address

00h.

5.6.4

Acknowledge in read mode

For all Read commands, after each byte read, the device waits for an acknowledgment

during the 9th bit time. If the bus master does not drive Serial Data (SDA) low during

thistime, the device terminates the data transfer and switches to its Standby mode.

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