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STTS2004

Temperature sensor registers

The temperature sensor configuration register holds the control and status bits of the

EVENT pin as well as general hysteresis on all limits. To avoid glitches on the EVENT

output pin, users should disable EVENT or CRITICAL functions prior to programming or

changing other device configuration settings.

Table 9. Configuration register format

Bit15

Bit14

Bit13

Bit12

Bit11

Bit10

Bit9

Bit8

RFU

Hysteresis

Shutdown

mode

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Critical lock

bit

Alarm lock

bit

Clear event

Event output

status

Event output

control

Critical

event only

Event

polarity

Event

mode

Table 10. Configuration register bit definitions

Bit

Definition

Event mode

– 0 = Comparator output mode (this is the default).

– 1 = Interrupt mode; when either of the lock bits (bit6 or bit7) is set, this bit cannot be altered until it is

unlocked.

Event polarity(1)

The event polarity bit controls the active state of the EVENT pin. The EVENT pin is driven to this state

when it is asserted.

– 0 = Active-low (this is the default). Requires a pull-up resistor to set the inactive state of the open-drain

output. The power to the pull-up resistor should not be greater than VDD + 0.2 V. Active state is logical

“0”.

– 1 = Active-high. The active state of the pin is then logical “1”.

Critical event only

– 0 = Event output on alarm or critical temperature event (this is the default).

– 1 = Event only if the temperature is above the value in the critical temperature register (TA > TCRIT); when

the alarm window lock bit (bit6) is set, this bit cannot be altered until it is unlocked.

Event output control

– 0 = Event output disabled (this is the default).

– 1 = Event output enabled; when either of the lock bits (bit6 or bit7) is set, this bit cannot be altered until it

is unlocked.

Event status (read-only)(2)

– 0 = Event output condition is not being asserted by this device.

– 1 = Event output condition is being asserted by this device via the alarm window or critical trip event.

Clear event (write-only)(3)

– 0 = No effect.

– 1 = Clears the active event in interrupt mode. The pin is released and will not assert until a new interrupt

condition occurs.

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