UCD3138 datasheet(16/89 Pages) TI1

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UCD3138

SLUSAP2G – MARCH 2012 – REVISED SEPTEMBER 2016

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Specifications

Electrical Characteristics (continued)

V33A = V33D = V33DIO = 3.3 V; 1 μF from BP18 to DGND, TJ = –40°C to 125°C (unless otherwise noted)

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

(6)

Characterized by design and not production tested.

(7)

Ambient temperature offset value should be used from the TEMPSENCTRL register to meet accuracy.

(8)

Available from reference DACs for comparators D, E, F, and G.

Brownout

Internal signal warning of brownout

conditions

2.9

TEMPERATURE SENSOR(6)

VTEMP

Voltage range of sensor

1.46

2.44

Voltage resolution

V/°C

5.9

mV/ºC

Temperature resolution

°C per bit

0.1034

ºC/LSB

Accuracy(6)(7)

–40°C to 125°C

–10

±5

ºC

Temperature range

–40°C to 125°C

–40

125

ºC

ITEMP

Current draw of sensor when active

μA

TON

Turn on time / settling time of sensor

100

μs

VAMB

Ambient temperature

Trimmed 25°C reading

1.85

ANALOG COMPARATOR

DAC

Reference DAC Range

2.5

Reference Voltage

2.478

2.5

2.513

Bits

bits

INL(6)

–0.42

0.21

LSB

DNL(6)

0.06

0.12

LSB

Offset

–5.5

19.5

Time to disable DPWM output based on 0

V to 2.5 V step input on the analog

comparator.(1)

150

Reference DAC buffered output load(8)

0.5

Buffer offset (–0.5 mA)

4.6

8.3

Buffer offset (1.0 mA)

–0.05

(1)

Fast mode, 400 kHz

(2)

The device times out when any clock low exceeds t(TIMEOUT).

5.6

Timing and Switching Characteristics

The timing characteristics and timing diagram for the communications interface that supports I2C, SMBus,

and PMBus in Slave or Master mode are shown in Table 5-1, Figure 5-1, and Figure 5-2. The numbers in

Table 5-1 arµe for 400 kHz operating frequency. However, the device supports all three speeds, standard

(100 kHz), fast (400 kHz), and fast mode plus (1 MHz).

Table 5-1. PMBus/SMBus/I2C Timing

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

Typical values at TA = 25°C and VCC = 3.3 V (unless otherwise noted)

fSMB

SMBus/PMBus operating frequency

Slave mode, SMBC 50% duty cycle

100 1000

kHz

fI2C

I2C operating frequency

Slave mode, SCL 50% duty cycle

100 1000

kHz

t(BUF)

Bus free time between start and

stop(1)

1.3

µs

t(HD:STA)

Hold time after (repeated) start(1)

0.6

µs

t(SU:STA)

Repeated start setup time(1)

0.6

µs

t(SU:STO)

Stop setup time(1)

0.6

µs

t(HD:DAT)

Data hold time

Receive mode

t(SU:DAT)

Data setup time

100

t(TIMEOUT)

Error signal/detect(2)

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