LT1737IGN datasheet(6/28 Pages) LINER

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LT1737

1737f

PI FU CTIO S

PGND (Pin 1): The power ground pin carries the GATE

node discharge current. This is typically a current spike of

several hundred mA with a duration of tens of nanosec-

onds. It should be connected directly to a good quality

ground plane.

ISENSE (Pin 2): Pin to measure switch current with external

sense resistor. The sense resistor should be of a nonin-

ductive construction as high speed performance is essen-

tial. Proper grounding technique is also required to avoid

distortion of the high speed current waveform. A preset

internal limit of nominally 250mV at this pin effects a

switch current limit.

SFST (Pin 3): Pin for optional external capacitor to effect

soft-start function. See Applications Information for

details.

ROCMP (Pin 4): Input pin for optional external load com-

pensation resistor. Use of this pin allows nominal com-

pensation for nonzero output impedance in the power

transformer secondary circuit, including secondary wind-

ing impedance, output Schottky diode impedance and

output capacitor ESR. In less demanding applications, this

resistor is not needed. See Applications Information for

more details.

RCMPC (Pin 5): Pin for external filter capacitor for optional

load compensation function. A common 0.1

µF ceramic

capacitor will suffice for most applications. See Applica-

tions Information for further details.

OSCAP (Pin 6): Pin for external timing capacitor to set

oscillator switching frequency. See Applications Informa-

tion for details.

VC (pin 7): This is the control voltage pin which is the

output of the feedback amplifier and the input of the

current comparator. Frequency compensation of the

overall loop is effected in most cases by placing a

capacitor between this node and ground.

FB (Pin 8): Input pin for external “feedback” resistor

divider. The ratio of this divider, times the internal band-

gap (VBG) reference, times the effective transformer turns

ratio is the primary determinant of the output voltage. The

Thevenin equivalent resistance of the feedback divider

should be roughly 3k. See Applications Information for

more details.

3VOUT (Pin 9): Output pin for nominal 3V reference. This

facilitates various user applications. This node is internally

current limited for protection and is intended to drive

either moderate capacitive loads of several hundred pF or

less, or, very large capacitive loads of 0.1

µF or more. See

Applications Information for more details.

UVLO (Pin 10): This is a dual function pin that implements

both undervoltage lockout and shutdown functions. Pull-

ing this pin to near ground effects shutdown and reduces

quiescent current to tens of microamperes.

Additionally, an external resistor divider between VIN and

ground may be connected to this pin to implement an

undervoltage lockout function. The bias current on this pin

is a function of the state of the UVLO comparator; as the

threshold is exceeded, the bias current increases. This

creates a hysteresis band equal to the change in bias

current times the Thevenin impedance of the user’s resis-

tive divider. The user may thereby adjust the impedance of

the UVLO divider to achieve a desired degree of hysteresis.

A 100pF capacitor to ground is recommended on this pin.

See Application Information for details.

SGND (Pin 11): The signal ground pin is a clean ground.

The internal reference, oscillator and feedback amplifier

are referred to it. Keep the ground path connection to the

FB pin, OSCAP capacitor and the VC compensation capaci-

tor free of large ground currents.

MINENAB (Pin 12): Pin for external programming resistor

to set minimum enable time. See Applications Information

for details.

ENDLY (Pin 13): Pin for external programming resistor to

set enable delay time. See Applications Information for

details.

tON (Pin 14): Pin for external programming resistor to set

switch minimum on time. See Applications Information

for details.

VCC (Pin 15): Supply voltage for the LT1737. Bypass this

pin to ground with 1

µF or more.

GATE (Pin 16): This is the gate drive to the external power

MOSFET switch and has large dynamic currents flowing

through it. Keep the trace to the MOSFET as short as

possible to minimize electromagnetic radiation and volt-

age spikes. A series resistance of 5

Ω or more may help to

dampen ringing in less than ideal layouts.

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