A25GFM080QL datasheet(16/58 Pages) AMICC

Nome de Peças	A25GFM080QL

Descrição Electrónicos	8Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory

PDF	58 Pages

Scroll/Zoom	100%

Fabricante Electrônico	AMICC [AMIC Technology]

Página de início	http://www.amictechnology.com

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A25LQ080 Series

(April, 2016, Version 1.0)

AMIC Technology Corp.

SUS bit.

The Suspend Status (SUS) bit is a volatile read only

bit in the status register (b15) which is set to 1 after executing

a Program/Erase Suspend instruction. The SUS bit is cleared

to 0 by Program/Erase Resume instruction as well as a

power-down, power-up cycle.

Note

When APT is 0, BP2, BP1, BP0 won’t be changed after

power-on.

When APT is 1 and CMP is 0, all BP2, BP1, BP0 will be

set to 1 after power-on.

3. When APT is 1 and CMP is 1, all BP2, BP1, BP0 will be

set to 0 after power-on.

Figure 5. Read Status Register (RDSR) Instruction Sequence and Data-Out Sequence

810

911 12 13 14 15

MSB

Status Register 1 or 2 Out

High Impedance

Instruction (05h or 35h)

0 1 234 5 6 7

16 17 18 19 20 21 22 23

A25GFM080QL Folha de dados(PDF) 16 Page - AMIC Technology