UCD3138128APFC datasheet(59/83 Pages) TI1

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UCD3138128A

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SLUSC99 – JULY 2016

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ADDRESS

SIZE

MODULE

0xFFF7_F700 - 0xFFF7_F7FF

256

PMBus/I2C Interface (2)

0xFFF7_FA00 - 0xFFF7_FAFF

256

GIO

0xFFF7_FD00 - 0xFFF7_FDFF

256

Timer

0xFFFF_FD00 - 0xFFFF_FDFF

256

MMC

0xFFFF_FE00 - 0xFFFF_FEFF

256

DEC

0xFFFF_FF20 - 0xFFFF_FF37

CIM

0xFFFF_FFD0 - 0xFFFF_FFEC

SYS

The registers and bit definitions inside the System and Peripheral blocks are detailed in the programmer’s

manuals.

9.5.2 Boot ROM

The device incorporates a 8 kB boot ROM. This boot ROM includes support for:

•

Program download through the PMBus

•

Device initialization

•

Examining and modifying registers and memory

•

Verifying and executing program flash automatically

•

Jumping to a customer defined boot program

•

Checksum evaluation to support using the program flash as a single 64 kB block or as 2-32 kB blocks.

The Boot ROM is entered automatically on device reset. It initializes the device and then performs checksums on

the program flash. If the first 2 kB of program FLASH 0 has a valid checksum, the program branches to location

0 in Program FLASH 0. This permits the use of a custom boot program. If the first checksum fails, it performs

some additional checksum calculations to determine where the valid program is located. This permits full

automated program memory checking, when there is no need for a custom boot program. The complete decision

tree is located in Pseudo Code for ROM. Additionally, the part can support two separate programs in block 0 and

block 1 through a custom boot-flash routine.

If none of the checksums are valid, the Boot ROM stays in control, and accepts commands via the PMBus

interface. These functions can be used to read and write to all memory locations in the device. Typically they are

at address 11 and are used to download a program to Program Flash, and to command its execution.

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