UCD3138128APFC datasheet(38/83 Pages) TI1

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All are S0.23

Saturate

S2.23

S0.23

Shifter

S0.23

Yn Scale

Clamp

S0.23

Filter Yn

Clamp High

Filter Yn

Clamp Low

Filter Yn

Kp Coef

Xn-1 Reg

Clamp

Kd yn_reg

Kd alpha

Limit Comparator

PID Filter Branch Stages

Ki High

EADC_DATA

Ki Coef

Kd coef

Limit 5

Limit 6

…..

Limit 0

Coefficient

select

Ki Low

Optional

Selected

KI_ADDER_

MODE

Clamp

Ki_yn reg

Round

n-1

–

UCD3138128A

SLUSC99 – JULY 2016

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Figure 23. First Section of the Filter

The filter input, Xn, generally comes from a front end. Then there are three branches, P, I. and D. Note that the D

branch also has a pole, Kd Alpha. Clamps are provided both on the I branch and on the D alpha pole.

The filter also supports a nonlinear mode, where up to 7 different sets of coefficients can be selected depending

on the magnitude of the error input Xn. This can be used to increase the filter gain for higher errors to improve

transient response.

Here is the output section of the filter (S0.23 means that there is 1 sign bit, 0 integer bits and 23 fractional bits).

Figure 24. Output Section of the Filter

This section combines the P, I, and D sections, and provides for saturation, scaling, and clamping.

There is a final section for the filter, which permits its output to be matched to the DPWM:

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