CC1150-RTY1 datasheet(10/67 Pages) TI1

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CC1150

SWRS037B – JANUARY 2006 – REVISED MARCH 2015

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4.11 Power-On Reset

For proper Power-On-Reset functionality, the power supply must comply with the requirements in this table. Otherwise, the

chip should be assumed to have unknown state until transmitting an SRES strobe over the SPI interface. See Section 5.11.1

for a description of the recommended start-up sequence after turning power on.

PARAMETER

MIN

TYP

MAX

UNIT

CONDITION

Power up ramp-up time

From 0 V until reaching 1.8 V

Minimum time between power on and

Power-off time

power off

4.12 Thermal Resistance Characteristics for VQFNP Package

NAME

DESCRIPTION

°C/W(1) (2)

RθJC(top)

Junction-to-case (top)

54.0

RθJB

Junction-to-board

25.1

RθJA

Junction-to-free air

48.3

PsiJT

Junction-to-package top

1.6

PsiJB

Junction-to-board

25.2

RθJC(bottom)

Junction-to-case (bottom)

6.3

(1)

°C/W = degrees Celsius per watt.

(2)

These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RθJC] value, which is based on a

JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these

EIA/JEDEC standards:

•

JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)

•

JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

•

JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

•

JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements

Power dissipation of 2 W and an ambient temperature of 70ºC is assumed.

Specifications

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