COP8CDR9KMT7 datasheet(19/84 Pages) NSC

19 / 84 page

9.0 Pin Descriptions (Continued)

Configuration registers should not be used. All E pins have

Schmitt triggers on the inputs. Port E draws no power when

unbonded.

Port F is a 4-bit I/O Port. All F pins have Schmitt triggers on

the inputs.

The 68-pin package has fewer than eight Port F pins, and

contains unbonded, floating pads internally on the chip. The

binary values read from these bits are undetermined. The

application software should mask out these unknown bits

when reading the Port F register, or use only bit-access

program instructions when accessing Port F. The uncon-

nected bits draw power only when they are addressed (i.e.,

in brief spikes).

Port G is an 8-bit port. Pin G0, G2–G5 are bi-directional I/O

ports. Pin G6 is always a general purpose Hi-Z input. All pins

have Schmitt Triggers on their inputs. Pin G1 serves as the

dedicated WATCHDOG output with weak pull-up if the

WATCHDOG feature is selected by the Option register.

The pin is a general purpose I/O if WATCHDOG feature is

not selected. If WATCHDOG feature is selected, bit 1 of the

Port G configuration and data register does not have any

effect on Pin G1 setup. G7 serves as the dedicated output

pin for the CKO clock output.

Since G6 is an input only pin and G7 is the dedicated CKO

clock output pin, the associated bits in the data and configu-

ration registers for G6 and G7 are used for special purpose

functions as outlined below. Reading the G6 and G7 data

bits will return zeros.

The device will be placed in the HALT mode by writing a “1”

to bit 7 of the Port G Data Register. Similarly the device will

be placed in the IDLE mode by writing a “1” to bit 6 of the

Port G Data Register.

Writing a “1” to bit 6 of the Port G Configuration Register

enables the MICROWIRE/PLUS to operate with the alter-

nate phase of the SK clock. The G7 configuration bit, if set

high, enables the clock start up delay after HALT when the

R/C clock configuration is used.

Config. Reg.

Data Reg.

CLKDLY

HALT

Alternate SK

IDLE

Port G has the following alternate features:

G7 CKO Oscillator dedicated output

G6 SI (MICROWIRE/PLUS Serial Data Input)

G5 SK (MICROWIRE/PLUS Serial Clock)

G4 SO (MICROWIRE/PLUS Serial Data Output)

G3 T1A (Timer T1 I/O)

G2 T1B (Timer T1 Capture Input)

G1 WDOUT WATCHDOG and/or Clock Monitor if WATCH-

DOG enabled, otherwise it is a general purpose I/O

G0 INTR (External Interrupt Input)

G0 through G3 are also used for In-System Emulation.

Port L is an 8-bit I/O port. All L-pins have Schmitt triggers on

the inputs.

Port L supports the Multi-Input Wake-up feature on all eight

pins. Port L has the following alternate pin functions:

L7 Multi-Input Wake-up or T3B (Timer T3B Input)

L6 Multi-Input Wake-up or T3A (Timer T3A Input/Output)

L5 Multi-Input Wake-up or T2B (Timer T2B Input)

L4 Multi-input Wake-up or T2A (Timer T2A Input/Output)

L3 Multi-Input Wake-up and/or RDX (USART Receive)

L2 Multi-Input Wake-up or TDX (USART Transmit)

L1 Multi-Input Wake-up and/or CKX (USART Clock) (Low

Speed Oscillator Output)

L0 Multi-Input Wake-up (Low Speed Oscillator Input)

Port D is an 8-bit output port that is preset high when RESET

goes low. The user can tie two or more D port outputs

(except D2) together in order to get a higher drive.

Note: Care must be exercised with the D2 pin operation. At

RESET, the external loads on this pin must ensure that the

output voltages stay above 0.7 V

CC to prevent the chip from

entering special modes. Also keep the external loading on

D2 to less than 1000 pF.

10137406

FIGURE 3. I/O Port Configurations

10137407

FIGURE 4. I/O Port Configurations — Output Mode

COP8CDR9KMT7 Folha de dados(PDF) 19 Page - National Semiconductor (TI)

COP8CDR9KMT7 Folha de dados(HTML) 19 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Folha de dados Download

Ligação URL