COP8CDR9KMT7 datasheet(30/84 Pages) NSC

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11.0 In-System Programming (Continued)

TABLE 8. PGMTIM Register Format

PGMTIM

CKI Frequency Range

654

25 kHz–33.3 kHz

37.5 kHz–50 kHz

50 kHz–66.67 kHz

62.5 kHz–83.3 kHz

75 kHz–100 kHz

100 kHz–133 kHz

112.5 kHz–150 kHz

150 kHz–200 kHz

200 kHz–266.67 kHz

225 kHz–300 kHz

300 kHz–400 kHz

375 kHz–500 kHz

500 kHz–666.67 kHz

600 kHz–800 kHz

800 kHz–1.067 MHz

1 MHz–1.33 MHz

1.125 MHz–1.5 MHz

1.5 MHz–2 MHz

2 MHz–2.67 MHz

2.625 MHz–3.5 MHz

3.5 MHz–4.67 MHz

4.5 MHz–6 MHz

6 MHz–8 MHz

7.5 MHz–10 MHz

R/W

11.4 MANEUVERING BACK AND FORTH BETWEEN

FLASH MEMORY AND BOOT ROM

When using ISP, at some point, it will be necessary to

maneuver between the flash program memory and the Boot

ROM, even when using customized ISP routines. This is

because it’s not possible to execute from the flash program

memory while it’s being programmed.

Two instructions are available to perform the jumping back

and forth: Jump to Boot (JSRB) and Return to Flash (RETF).

The JSRB instruction is used to jump from flash memory to

Boot ROM, and the RETF is used to return from the Boot

ROM back to the flash program memory. See 20.0 Instruc-

tion Set for specific details on the operation of these instruc-

tions.

The JSRB instruction must be used in conjunction with the

Key register. This is to prevent jumping to the Boot ROM in

the event of run-away software. For the JSRB instruction to

actually jump to the Boot ROM, the Key bit must be set. This

is done by writing the value shown in Table 9 to the Key

KEY bit will be set for 8 instruction cycles. The JSRB instruc-

tion must be executed while the KEY bit is set. If the KEY

does not match, then the KEY bit will not be set and the

JSRB will jump to the specified location in the flash memory.

In emulation mode, if a breakpoint is encountered while the

KEY is set, the counter that counts the instruction cycles will

be frozen until the breakpoint condition is cleared. If an

interrupt occurs while the key is set, the key will expire

before interrupt service is complete. It is recommended that

the software globally disable interrupts before setting the

key. The Key register is a memory mapped register. Its

format when writing is shown in Table 9. In normal operation,

it is not necessary to test the KEY bit before using the JSRB

instruction. The additional instructions required to test the

key may cause the key to time-out before the JSRB can be

executed.

TABLE 9. KEY Register Write Format

KEY When Writing

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Bits 7–2: Key value that must be written to set the KEY bit.

Bits 1–0: Don’t care.

11.5 FORCED EXECUTION FROM BOOT ROM

When the user is developing a customized ISP routine, code

lockups due to software errors may be encountered. The

normal, and preferred, method to recover from these condi-

tions is to reprogram the device with the corrected code by

either an external parallel programmer or the emulation

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