P4C164LL-100CWCLF datasheet(4/10 Pages) PYRAMID

Nome de Peças	P4C164LL-100CWCLF

Descrição Electrónicos	VERY LOW POWER 8Kx8 STATIC CMOS RAM

PDF	10 Pages

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Fabricante Electrônico	PYRAMID [Pyramid Semiconductor Corporation]

Página de início	http://www.pyramidsemiconductor.com

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P4C164LL - VERY LOW POWER 8K x 8 STATIC CMOS RAM

Page 4

Document # SRAM116 REV 04

TIMIng WAVEFORM OF READ CYCLE nO. 1 (OE COnTROLLED)(1)

TIMIng WAVEFORM OF READ CYCLE nO. 2 (ADDRESS COnTROLLED)

notes:

5. WE is HIGH for READ cycle.

6. CE

1 is LOW, CE2 is HIGH and OE is LOW for READ cycle.

7. ADDRESS must be valid prior to, or coincident with CE

1 transition LOW

and CE

2 transition HIGH.

8. Transition is measured ± 200 mV from steady state voltage prior to

change,withloadingasspecifiedinFigure1. Thisparameterissampled

and not 100% tested.

9. Read Cycle Time is measured from the last valid address to the first

transitioning address.

10. Transitions caused by a chip enable control have similar delays ir-

respective of whether CE

1 or CE2 causes them.

TIMIng WAVEFORM OF READ CYCLE nO. 3 (CE

1, CE2 COnTROLLED)

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