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PIC10F320T-EMCSQTP Folha de dados(PDF) 17 Page - Microchip Technology |
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PIC10F320T-EMCSQTP Folha de dados(HTML) 17 Page - Microchip Technology |
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17 / 210 page ![]() 2011 Microchip Technology Inc. Preliminary DS41585A-page 17 PIC10(L)F320/322 TABLE 2-3: SPECIAL FUNCTION REGISTER SUMMARY (BANK 0) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other resets Bank 0 00h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx xxxx xxxx 01h TMR0 Timer0 Module Register xxxx xxxx uuuu uuuu 02h PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 03h STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 000q quuu 04h FSR Indirect Data Memory Address Pointer xxxx xxxx uuuu uuuu 05h PORTA — — — — RA3 RA2 RA1 RA0 ---- xxxx ---- uuuu 06h TRISA — — — — —(1) TRISA2 TRISA1 TRISA0 ---- 1111 ---- 1111 07h LATA — — — — — LATA2 LATA1 LATA0 ---- -xxx ---- -uuu 08h ANSELA — — — — — ANSA2 ANSA1 ANSA0 ---- -111 ---- -111 09h WPUA — — — — WPUA3 WPUA2 WPUA1 WPUA0 ---- 1111 ---- 1111 0Ah PCLATH — — — — — — — PCLH0 ---- ---0 ---- ---0 0Bh INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 0000 0000 000u 0Ch PIR1 —ADIF — NCO1IF CLC1IF —TMR2IF — -0-0 0-0- -0-0 0-0- 0Dh PIE1 —ADIE — NCO1IE CLC1IE —TMR2IE — -0-0 0-0- -0-0 0-0- 0Eh OPTION_REG WPUEN INTEDG T0CS T0SE PSA PS<2:0> 1111 1111 uuuu uuuu 0Fh PCON — — — — — —POR BOR ---- --qq ---- --uu 10h OSCCON — IRCF<2:0> HFIOFR — LFIOFR HFIOFS -110 0-00 -110 0-00 11h TMR2 Timer2 Module Register 0000 0000 0000 0000 12h PR2 Timer2 Period Register 1111 1111 1111 1111 13h T2CON — TOUTPS<3:0> TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 14h PWM1DCL PWM1DCL<1:0> — — — — — — xx-- ---- uu-- ---- 15h PWM1DCH PWM1DCH<7:0> xxxx xxxx uuuu uuuu 16h PWM1CON PWM1EN PWM1OE PWM1OUT PWM1POL — — — — 0000 ---- 0000 ---- 17h PWM2DCL PWM2DCL<1:0> — — — — — — xx-- ---- uu-- ---- 18h PWM2DCH PWM2DCH<7:0> xxxx xxxx uuuu uuuu 19h PWM2CON PWM2EN PWM2OE PWM2OUT PWM2POL — — — — 0000 ---- 0000 ---- 1Ah IOCAP — — — — IOCAP3 IOCAP2 IOCAP1 IOCAP0 ---- 0000 ---- 0000 1Bh IOCAN — — — — IOCAN3 IOCAN2 IOCAN1 IOCAN0 ---- 0000 ---- 0000 1Ch IOCAF — — — — IOCAF3 IOCAF2 IOCAF1 IOCAF0 ---- 0000 ---- 0000 1Dh FVRCON FVREN FVRRDY TSEN TSRNG — —ADFVR<1:0> 0x00 --00 0x00 --00 1Eh ADRES A/D Result Register xxxx xxxx uuuu uuuu 1Fh ADCON ADCS<2:0> CHS<2:0> GO/ DONE ADON 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: Unimplemented, read as ‘1’. |
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